I'm porting V8 to SPARC

El martes, 24 de noviembre de 2015, 10:26:07 (UTC+1), Yang Guo escribió:
>
> What's the motivation to this? Three unused bits seems fine, when we need 
> none.
>
> Yang
>
> On Tue, Nov 24, 2015 at 10:18 AM <[email protected] <javascript:>> 
> wrote:
>
>> The CpuFeature enum in src/globals.h is almost 
>> full, NUMBER_OF_CPU_FEATURES is now 29 (of 32)
>> There is almost no room for another port (to another CPU)
>>
>> Is it possible to make more room there?
>>
>> Maybe changing the size of the supported_ memember variable at the 
>> CpuFeatures class in assembler.h.
>> Another possibility may be perhaps to surround the definitions by 
>> platform defines like:
>>
>> // CPU feature flags.
>> enum CpuFeature {
>> #ifdef V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
>>   // x86
>>   SSE4_1,
>>   SSE3,
>>   SAHF,
>>   AVX,
>>   FMA3,
>>   BMI1,
>>   BMI2,
>>   LZCNT,
>>   POPCNT,
>>   ATOM,
>> #endif
>> #ifdef V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64
>>   // ARM
>>   VFP3,
>>   ARMv7,
>>   ARMv8,
>>   SUDIV,
>>   MLS,
>>   UNALIGNED_ACCESSES,
>>   MOVW_MOVT_IMMEDIATE_LOADS,
>>   VFP32DREGS,
>>   NEON,
>> #endif
>> #ifdef V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
>>   // MIPS, MIPS64
>>   FPU,
>>   FP64FPU,
>>   MIPSr1,
>>   MIPSr2,
>>   MIPSr6,
>> #endif
>> #ifdef V8_HOST_ARCH_ARM64
>>   // ARM64
>>   ALWAYS_ALIGN_CSP,
>>   COHERENT_CACHE,
>> #endif
>> #ifdef V8_HOST_ARCH_PPC
>>   // PPC
>>   FPR_GPR_MOV,
>>   LWSYNC,
>>   ISELECT,
>> #endif
>>   NUMBER_OF_CPU_FEATURES
>> }
>>
>> Also see that there are cpu independent code that uses some of the cpu 
>> dependent features:
>> in assembler.cc 
>>
>> void AssemblerBase::FlushICache(Isolate* isolate, void* start, size_t 
>> size) {
>>   if (size == 0) return;
>>   if (CpuFeatures::IsSupported(COHERENT_CACHE)) return;  // This is only 
>> for ARM64????
>>
>> #if defined(USE_SIMULATOR)
>>   Simulator::FlushICache(isolate->simulator_i_cache(), start, size);
>> #else
>>   CpuFeatures::FlushICache(start, size);
>> #endif  // USE_SIMULATOR
>> }
>>
>> and in code-stubs.h
>>
>>
>> class DoubleToIStub : public PlatformCodeStub {
>>  public:
>>   DoubleToIStub(Isolate* isolate, Register source, Register destination,
>>                 int offset, bool is_truncating, bool skip_fastpath = 
>> false)
>>       : PlatformCodeStub(isolate) {
>>     minor_key_ = SourceRegisterBits::encode(source.code()) |
>>                  DestinationRegisterBits::encode(destination.code()) |
>>                  OffsetBits::encode(offset) |
>>                  IsTruncatingBits::encode(is_truncating) |
>>                  SkipFastPathBits::encode(skip_fastpath) |
>>                  SSE3Bits::encode(CpuFeatures::IsSupported(SSE3) ? 1 : 
>> 0);  // Only ia32 and x64 ???
>>   }
>>
>>
>> Any thoughts?
>>
>> -- 
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