Okay, thanks, then I will just use WordPtrAdd at the graph level too. On Thursday, February 20, 2025 at 11:53:08 AM UTC [email protected] wrote:
> Hi, > > From a quick look, it seems Simd128LaneMemoryOps are only created in > wasm/turboshaft-graph-interface.cc, and there, the offset is always 0. > Then, there is no phases at all that reduces (or even looks at for that > matter) Simd128LaneMemoryOp, so when we reach the ISEL, the offset should > still be 0. > > > And also, would it be possible to move the offset into a register during > isel? > > I would guess that yes, but I haven't looked at the details. > Alternatively, some normalization could be done right before the ISEL in > load-store-simplification-reducer.h. > > Cheers, > Darius > On Thursday, February 20, 2025 at 12:33:42 PM UTC+1 [email protected] > wrote: > >> Hi, >> >> I'm trying to introduce a new load-type node and I've been looking at >> LaneMemory as an example. When LoadLane is selected, in the arm64 backend, >> there appears to be an assumption that the offset is always zero. In my >> example, that is not the case. So, I was wondering how this guarantee is >> made for Simd128LaneMemoryOps? And also, would it be possible to move the >> offset into a register during isel? >> >> Cheers, >> Sam >> > -- -- v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev --- You received this message because you are subscribed to the Google Groups "v8-dev" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion visit https://groups.google.com/d/msgid/v8-dev/d76d1f9e-9e87-410a-90a8-4a2c942aa369n%40googlegroups.com.
