Revision: 4694
Author: [email protected]
Date: Thu May 20 12:30:35 2010
Log: ARM cleanup: Remove lea, swap, swapb instrutions.  This is a commit
of http://codereview.chromium.org/2064012/show for Rodolph Perfetta.

http://code.google.com/p/v8/source/detail?r=4694

Modified:
 /branches/bleeding_edge/src/arm/assembler-arm.cc
 /branches/bleeding_edge/src/arm/assembler-arm.h
 /branches/bleeding_edge/src/arm/assembler-thumb2.cc
 /branches/bleeding_edge/src/arm/assembler-thumb2.h
 /branches/bleeding_edge/src/arm/builtins-arm.cc

=======================================
--- /branches/bleeding_edge/src/arm/assembler-arm.cc Thu May 20 06:54:31 2010 +++ /branches/bleeding_edge/src/arm/assembler-arm.cc Thu May 20 12:30:35 2010
@@ -1427,26 +1427,6 @@
                     Condition cond) {
   addrmod4(cond | B27 | am, base, src);
 }
-
-
-// Semaphore instructions.
-void Assembler::swp(Register dst, Register src, Register base, Condition cond) {
-  ASSERT(!dst.is(pc) && !src.is(pc) && !base.is(pc));
-  ASSERT(!dst.is(base) && !src.is(base));
-  emit(cond | P | base.code()*B16 | dst.code()*B12 |
-       B7 | B4 | src.code());
-}
-
-
-void Assembler::swpb(Register dst,
-                     Register src,
-                     Register base,
-                     Condition cond) {
-  ASSERT(!dst.is(pc) && !src.is(pc) && !base.is(pc));
-  ASSERT(!dst.is(base) && !src.is(base));
-  emit(cond | P | B | base.code()*B16 | dst.code()*B12 |
-       B7 | B4 | src.code());
-}


 // Exception-generating instructions and debugging support.
@@ -1990,34 +1970,6 @@
   ASSERT(0 <= type && type <= 14);  // mov pc, pc is not a nop.
   emit(al | 13*B21 | type*B12 | type);
 }
-
-
-void Assembler::lea(Register dst,
-                    const MemOperand& x,
-                    SBit s,
-                    Condition cond) {
-  int am = x.am_;
-  if (!x.rm_.is_valid()) {
-    // Immediate offset.
-    if ((am & P) == 0)  // post indexing
-      mov(dst, Operand(x.rn_), s, cond);
-    else if ((am & U) == 0)  // negative indexing
-      sub(dst, x.rn_, Operand(x.offset_), s, cond);
-    else
-      add(dst, x.rn_, Operand(x.offset_), s, cond);
-  } else {
-    // Register offset (shift_imm_ and shift_op_ are 0) or scaled
-    // register offset the constructors make sure than both shift_imm_
-    // and shift_op_ are initialized.
-    ASSERT(!x.rm_.is(pc));
-    if ((am & P) == 0)  // post indexing
-      mov(dst, Operand(x.rn_), s, cond);
-    else if ((am & U) == 0)  // negative indexing
-      sub(dst, x.rn_, Operand(x.rm_, x.shift_op_, x.shift_imm_), s, cond);
-    else
-      add(dst, x.rn_, Operand(x.rm_, x.shift_op_, x.shift_imm_), s, cond);
-  }
-}


 bool Assembler::ImmediateFitsAddrMode1Instruction(int32_t imm32) {
=======================================
--- /branches/bleeding_edge/src/arm/assembler-arm.h     Mon May 17 23:38:42 2010
+++ /branches/bleeding_edge/src/arm/assembler-arm.h     Thu May 20 12:30:35 2010
@@ -780,10 +780,6 @@
void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al); void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al);

-  // Semaphore instructions
-  void swp(Register dst, Register src, Register base, Condition cond = al);
- void swpb(Register dst, Register src, Register base, Condition cond = al);
-
   // Exception-generating instructions and debugging support
   void stop(const char* msg);

@@ -929,10 +925,6 @@
   void pop() {
     add(sp, sp, Operand(kPointerSize));
   }
-
-  // Load effective address of memory operand x into register dst
-  void lea(Register dst, const MemOperand& x,
-           SBit s = LeaveCC, Condition cond = al);

   // Jump unconditionally to given label.
   void jmp(Label* L) { b(L, al); }
=======================================
--- /branches/bleeding_edge/src/arm/assembler-thumb2.cc Mon May 17 08:41:35 2010 +++ /branches/bleeding_edge/src/arm/assembler-thumb2.cc Thu May 20 12:30:35 2010
@@ -1203,26 +1203,6 @@
                     Condition cond) {
   addrmod4(cond | B27 | am, base, src);
 }
-
-
-// Semaphore instructions.
-void Assembler::swp(Register dst, Register src, Register base, Condition cond) {
-  ASSERT(!dst.is(pc) && !src.is(pc) && !base.is(pc));
-  ASSERT(!dst.is(base) && !src.is(base));
-  emit(cond | P | base.code()*B16 | dst.code()*B12 |
-       B7 | B4 | src.code());
-}
-
-
-void Assembler::swpb(Register dst,
-                     Register src,
-                     Register base,
-                     Condition cond) {
-  ASSERT(!dst.is(pc) && !src.is(pc) && !base.is(pc));
-  ASSERT(!dst.is(base) && !src.is(base));
-  emit(cond | P | B | base.code()*B16 | dst.code()*B12 |
-       B7 | B4 | src.code());
-}


 // Exception-generating instructions and debugging support.
@@ -1597,35 +1577,6 @@
   emit(cond | 0xE*B24 | 0xF*B20 |  B16 |
        dst.code()*B12 | 0xA*B8 | B4);
 }
-
-
-// Pseudo instructions.
-void Assembler::lea(Register dst,
-                    const MemOperand& x,
-                    SBit s,
-                    Condition cond) {
-  int am = x.am_;
-  if (!x.rm_.is_valid()) {
-    // Immediate offset.
-    if ((am & P) == 0)  // post indexing
-      mov(dst, Operand(x.rn_), s, cond);
-    else if ((am & U) == 0)  // negative indexing
-      sub(dst, x.rn_, Operand(x.offset_), s, cond);
-    else
-      add(dst, x.rn_, Operand(x.offset_), s, cond);
-  } else {
-    // Register offset (shift_imm_ and shift_op_ are 0) or scaled
-    // register offset the constructors make sure than both shift_imm_
-    // and shift_op_ are initialized.
-    ASSERT(!x.rm_.is(pc));
-    if ((am & P) == 0)  // post indexing
-      mov(dst, Operand(x.rn_), s, cond);
-    else if ((am & U) == 0)  // negative indexing
-      sub(dst, x.rn_, Operand(x.rm_, x.shift_op_, x.shift_imm_), s, cond);
-    else
-      add(dst, x.rn_, Operand(x.rm_, x.shift_op_, x.shift_imm_), s, cond);
-  }
-}


 bool Assembler::ImmediateFitsAddrMode1Instruction(int32_t imm32) {
=======================================
--- /branches/bleeding_edge/src/arm/assembler-thumb2.h Wed Apr 21 00:32:04 2010 +++ /branches/bleeding_edge/src/arm/assembler-thumb2.h Thu May 20 12:30:35 2010
@@ -735,10 +735,6 @@
void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al); void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al);

-  // Semaphore instructions
-  void swp(Register dst, Register src, Register base, Condition cond = al);
- void swpb(Register dst, Register src, Register base, Condition cond = al);
-
   // Exception-generating instructions and debugging support
   void stop(const char* msg);

@@ -863,10 +859,6 @@
   void pop() {
     add(sp, sp, Operand(kPointerSize));
   }
-
-  // Load effective address of memory operand x into register dst
-  void lea(Register dst, const MemOperand& x,
-           SBit s = LeaveCC, Condition cond = al);

   // Jump unconditionally to given label.
   void jmp(Label* L) { b(L, al); }
=======================================
--- /branches/bleeding_edge/src/arm/builtins-arm.cc     Thu May 20 07:02:51 2010
+++ /branches/bleeding_edge/src/arm/builtins-arm.cc     Thu May 20 12:30:35 2010
@@ -132,7 +132,7 @@
   // of the JSArray.
   // result: JSObject
   // scratch2: start of next object
-  __ lea(scratch1, MemOperand(result, JSArray::kSize));
+  __ add(scratch1, result, Operand(JSArray::kSize));
   __ str(scratch1, FieldMemOperand(result, JSArray::kElementsOffset));

   // Clear the heap tag on the elements array.

--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev

Reply via email to