[v8-dev] [v8] r4878 committed - Remove the comisd instruction from the ia32 and x64 assemblers. We...

codesite-noreply Wed, 16 Jun 2010 05:33:38 -0700

Revision: 4878
Author: [email protected]
Date: Wed Jun 16 05:32:34 2010
Log: Remove the comisd instruction from the ia32 and x64 assemblers. We
should always use ucomisd.


Add missing pop from floating-point stack in case of allocation failure.
Review URL: http://codereview.chromium.org/2831009
http://code.google.com/p/v8/source/detail?r=4878

Modified:
 /branches/bleeding_edge/src/ia32/assembler-ia32.cc
 /branches/bleeding_edge/src/ia32/assembler-ia32.h
 /branches/bleeding_edge/src/ia32/codegen-ia32.cc
 /branches/bleeding_edge/src/x64/assembler-x64.cc
 /branches/bleeding_edge/src/x64/assembler-x64.h
 /branches/bleeding_edge/src/x64/codegen-x64.cc
 /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc

=======================================

--- /branches/bleeding_edge/src/ia32/assembler-ia32.cc Tue Jun 8 05:04:492010+++ /branches/bleeding_edge/src/ia32/assembler-ia32.cc Wed Jun 16 05:32:342010

@@ -2152,17 +2152,6 @@
   EMIT(0x51);
   emit_sse_operand(dst, src);
 }
-
-
-void Assembler::comisd(XMMRegister dst, XMMRegister src) {
-  ASSERT(CpuFeatures::IsEnabled(SSE2));
-  EnsureSpace ensure_space(this);
-  last_pc_ = pc_;
-  EMIT(0x66);
-  EMIT(0x0F);
-  EMIT(0x2F);
-  emit_sse_operand(dst, src);
-}


 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
=======================================

--- /branches/bleeding_edge/src/ia32/assembler-ia32.h Tue Jun 8 05:04:492010+++ /branches/bleeding_edge/src/ia32/assembler-ia32.h Wed Jun 16 05:32:342010

@@ -779,7 +779,6 @@
   void xorpd(XMMRegister dst, XMMRegister src);
   void sqrtsd(XMMRegister dst, XMMRegister src);

-  void comisd(XMMRegister dst, XMMRegister src);
   void ucomisd(XMMRegister dst, XMMRegister src);
   void movmskpd(Register dst, XMMRegister src);

=======================================

--- /branches/bleeding_edge/src/ia32/codegen-ia32.cc Wed Jun 16 01:29:252010+++ /branches/bleeding_edge/src/ia32/codegen-ia32.cc Wed Jun 16 05:32:342010

@@ -604,6 +604,10 @@
     RegisterFile empty_regs;
     SetFrame(clone, &empty_regs);
     __ bind(&allocation_failed);
+    if (!CpuFeatures::IsSupported(SSE2)) {
+      // Pop the value from the floating point stack.
+      __ fstp(0);
+    }
     unsafe_bailout_->Jump();

     done.Bind(value);
@@ -2991,7 +2995,7 @@
                               &not_numbers);

LoadComparisonOperandSSE2(masm_, right_side, xmm1, left_side,right_side,

                               &not_numbers);
-    __ comisd(xmm0, xmm1);
+    __ ucomisd(xmm0, xmm1);
   } else {
     Label check_right, compare;

@@ -7306,7 +7310,7 @@
     // Since xmm3 is 1 and xmm2 is -0.5 this is simply xmm2 + xmm3.
     __ addsd(xmm2, xmm3);
     // xmm2 now has 0.5.
-    __ comisd(xmm2, xmm1);
+    __ ucomisd(xmm2, xmm1);
     call_runtime.Branch(not_equal);
     // Calculates square root.
     __ movsd(xmm1, xmm0);
@@ -11592,7 +11596,7 @@
       CpuFeatures::Scope fscope(SSE2);
       __ movdbl(xmm0, FieldOperand(object, HeapNumber::kValueOffset));
       __ movdbl(xmm1, FieldOperand(probe, HeapNumber::kValueOffset));
-      __ comisd(xmm0, xmm1);
+      __ ucomisd(xmm0, xmm1);
     } else {
       __ fld_d(FieldOperand(object, HeapNumber::kValueOffset));
       __ fld_d(FieldOperand(probe, HeapNumber::kValueOffset));
@@ -11817,7 +11821,7 @@
       CpuFeatures::Scope use_cmov(CMOV);

       FloatingPointHelper::LoadSSE2Operands(masm, &non_number_comparison);
-      __ comisd(xmm0, xmm1);
+      __ ucomisd(xmm0, xmm1);

       // Don't base result on EFLAGS when a NaN is involved.
       __ j(parity_even, &unordered, not_taken);
=======================================

--- /branches/bleeding_edge/src/x64/assembler-x64.cc Tue Jun 8 05:04:492010+++ /branches/bleeding_edge/src/x64/assembler-x64.cc Wed Jun 16 05:32:342010

@@ -2736,17 +2736,6 @@
   emit(0x51);
   emit_sse_operand(dst, src);
 }
-
-
-void Assembler::comisd(XMMRegister dst, XMMRegister src) {
-  EnsureSpace ensure_space(this);
-  last_pc_ = pc_;
-  emit(0x66);
-  emit_optional_rex_32(dst, src);
-  emit(0x0f);
-  emit(0x2f);
-  emit_sse_operand(dst, src);
-}


 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.h     Tue Jun  8 05:04:49 2010
+++ /branches/bleeding_edge/src/x64/assembler-x64.h     Wed Jun 16 05:32:34 2010
@@ -1122,7 +1122,6 @@
   void xorpd(XMMRegister dst, XMMRegister src);
   void sqrtsd(XMMRegister dst, XMMRegister src);

-  void comisd(XMMRegister dst, XMMRegister src);
   void ucomisd(XMMRegister dst, XMMRegister src);

// The first argument is the reg field, the second argument is the r/mfield.

=======================================
--- /branches/bleeding_edge/src/x64/codegen-x64.cc      Wed Jun 16 03:03:47 2010
+++ /branches/bleeding_edge/src/x64/codegen-x64.cc      Wed Jun 16 05:32:34 2010
@@ -4429,7 +4429,7 @@
   // Since xmm3 is 1 and xmm2 is -0.5 this is simply xmm2 + xmm3.
   __ addsd(xmm2, xmm3);
   // xmm2 now has 0.5.
-  __ comisd(xmm2, xmm1);
+  __ ucomisd(xmm2, xmm1);
   call_runtime.Branch(not_equal);

   // Calculates square root.
@@ -6512,7 +6512,7 @@
                         &not_numbers);
   LoadComparisonOperand(masm_, right_side, xmm1, left_side, right_side,
                         &not_numbers);
-  __ comisd(xmm0, xmm1);
+  __ ucomisd(xmm0, xmm1);
   // Bail out if a NaN is involved.
   not_numbers.Branch(parity_even, left_side, right_side);

@@ -8909,7 +8909,7 @@
     CpuFeatures::Scope fscope(SSE2);
     __ movsd(xmm0, FieldOperand(object, HeapNumber::kValueOffset));
     __ movsd(xmm1, FieldOperand(probe, HeapNumber::kValueOffset));
-    __ comisd(xmm0, xmm1);
+    __ ucomisd(xmm0, xmm1);
     __ j(parity_even, not_found);  // Bail out if NaN is involved.
     __ j(not_equal, not_found);  // The cache did not contain this value.
     __ jmp(&load_result_from_cache);
@@ -9116,7 +9116,7 @@
     FloatingPointHelper::LoadFloatOperand(masm, rax, xmm1,
                                           &non_number_comparison);

-    __ comisd(xmm0, xmm1);
+    __ ucomisd(xmm0, xmm1);

     // Don't base result on EFLAGS when a NaN is involved.
     __ j(parity_even, &unordered);
=======================================

--- /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Tue Jun 805:44:24 2010+++ /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Wed Jun 1605:32:34 2010

@@ -375,7 +375,7 @@
       __ divsd(xmm1, xmm0);
       __ movdbl(xmm1, Operand(ebx, ecx, times_4, 10000));
       __ movdbl(Operand(ebx, ecx, times_4, 10000), xmm1);
-      __ comisd(xmm0, xmm1);
+      __ ucomisd(xmm0, xmm1);

       // 128 bit move instructions.
       __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000));

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[v8-dev] [v8] r4878 committed - Remove the comisd instruction from the ia32 and x64 assemblers. We...

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