Revision: 4977
Author: [email protected]
Date: Tue Jun 29 07:03:11 2010
Log: X64: A number of small tweaks.
Fix bug in disassembler output (using non-generic registers for memory
operands in some cases).
Fix bug in movsxbq and make REX optional in movzx?q.
Review URL: http://codereview.chromium.org/2834027
http://code.google.com/p/v8/source/detail?r=4977
Modified:
/branches/bleeding_edge/src/x64/assembler-x64.cc
/branches/bleeding_edge/src/x64/codegen-x64.cc
/branches/bleeding_edge/src/x64/disasm-x64.cc
/branches/bleeding_edge/src/x64/macro-assembler-x64.cc
/branches/bleeding_edge/src/x64/virtual-frame-x64.cc
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.cc Thu Jun 24 02:03:49
2010
+++ /branches/bleeding_edge/src/x64/assembler-x64.cc Tue Jun 29 07:03:11
2010
@@ -1563,7 +1563,7 @@
void Assembler::movsxbq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
- emit_rex_32(dst, src);
+ emit_rex_64(dst, src);
emit(0x0F);
emit(0xBE);
emit_operand(dst, src);
@@ -1601,7 +1601,7 @@
void Assembler::movzxbq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
- emit_rex_64(dst, src);
+ emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xB6);
emit_operand(dst, src);
@@ -1621,7 +1621,7 @@
void Assembler::movzxwq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
- emit_rex_64(dst, src);
+ emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xB7);
emit_operand(dst, src);
=======================================
--- /branches/bleeding_edge/src/x64/codegen-x64.cc Mon Jun 28 23:47:19 2010
+++ /branches/bleeding_edge/src/x64/codegen-x64.cc Tue Jun 29 07:03:11 2010
@@ -856,7 +856,7 @@
__ j(equal, &adapted);
// No arguments adaptor frame. Copy fixed number of arguments.
- __ movq(rax, Immediate(scope()->num_parameters()));
+ __ Set(rax, scope()->num_parameters());
for (int i = 0; i < scope()->num_parameters(); i++) {
__ push(frame_->ParameterAt(i));
}
@@ -9067,16 +9067,16 @@
Label non_number_comparison;
Label unordered;
FloatingPointHelper::LoadSSE2UnknownOperands(masm,
&non_number_comparison);
+ __ xorl(rax, rax);
+ __ xorl(rcx, rcx);
__ ucomisd(xmm0, xmm1);
// Don't base result on EFLAGS when a NaN is involved.
__ j(parity_even, &unordered);
// Return a result of -1, 0, or 1, based on EFLAGS.
- __ movq(rax, Immediate(0)); // equal
- __ movq(rcx, Immediate(1));
- __ cmovq(above, rax, rcx);
- __ movq(rcx, Immediate(-1));
- __ cmovq(below, rax, rcx);
+ __ setcc(above, rax);
+ __ setcc(below, rcx);
+ __ subq(rax, rcx);
__ ret(2 * kPointerSize); // rax, rdx were pushed
// If one of the numbers was NaN, then the result is always false.
=======================================
--- /branches/bleeding_edge/src/x64/disasm-x64.cc Wed Jun 23 07:05:18 2010
+++ /branches/bleeding_edge/src/x64/disasm-x64.cc Tue Jun 29 07:03:11 2010
@@ -468,20 +468,20 @@
if (index == 4 && (base & 7) == 4 && scale == 0 /*times_1*/) {
// index == rsp means no index. Only use sib byte with no index
for
// rsp and r12 base.
- AppendToBuffer("[%s]", (this->*register_name)(base));
+ AppendToBuffer("[%s]", NameOfCPURegister(base));
return 2;
} else if (base == 5) {
// base == rbp means no base register (when mod == 0).
int32_t disp = *reinterpret_cast<int32_t*>(modrmp + 2);
AppendToBuffer("[%s*%d+0x%x]",
- (this->*register_name)(index),
+ NameOfCPURegister(index),
1 << scale, disp);
return 6;
} else if (index != 4 && base != 5) {
// [base+index*scale]
AppendToBuffer("[%s+%s*%d]",
- (this->*register_name)(base),
- (this->*register_name)(index),
+ NameOfCPURegister(base),
+ NameOfCPURegister(index),
1 << scale);
return 2;
} else {
@@ -489,7 +489,7 @@
return 1;
}
} else {
- AppendToBuffer("[%s]", (this->*register_name)(rm));
+ AppendToBuffer("[%s]", NameOfCPURegister(rm));
return 1;
}
break;
@@ -503,21 +503,21 @@
: *reinterpret_cast<char*>(modrmp + 2);
if (index == 4 && (base & 7) == 4 && scale == 0 /*times_1*/) {
if (-disp > 0) {
- AppendToBuffer("[%s-0x%x]", (this->*register_name)(base),
-disp);
+ AppendToBuffer("[%s-0x%x]", NameOfCPURegister(base), -disp);
} else {
- AppendToBuffer("[%s+0x%x]", (this->*register_name)(base),
disp);
+ AppendToBuffer("[%s+0x%x]", NameOfCPURegister(base), disp);
}
} else {
if (-disp > 0) {
AppendToBuffer("[%s+%s*%d-0x%x]",
- (this->*register_name)(base),
- (this->*register_name)(index),
+ NameOfCPURegister(base),
+ NameOfCPURegister(index),
1 << scale,
-disp);
} else {
AppendToBuffer("[%s+%s*%d+0x%x]",
- (this->*register_name)(base),
- (this->*register_name)(index),
+ NameOfCPURegister(base),
+ NameOfCPURegister(index),
1 << scale,
disp);
}
@@ -528,9 +528,9 @@
int disp = (mod == 2) ? *reinterpret_cast<int32_t*>(modrmp + 1)
: *reinterpret_cast<char*>(modrmp + 1);
if (-disp > 0) {
- AppendToBuffer("[%s-0x%x]", (this->*register_name)(rm), -disp);
+ AppendToBuffer("[%s-0x%x]", NameOfCPURegister(rm), -disp);
} else {
- AppendToBuffer("[%s+0x%x]", (this->*register_name)(rm), disp);
+ AppendToBuffer("[%s+0x%x]", NameOfCPURegister(rm), disp);
}
return (mod == 2) ? 5 : 2;
}
=======================================
--- /branches/bleeding_edge/src/x64/macro-assembler-x64.cc Fri Jun 25
05:31:49 2010
+++ /branches/bleeding_edge/src/x64/macro-assembler-x64.cc Tue Jun 29
07:03:11 2010
@@ -351,7 +351,7 @@
// arguments passed in because it is constant. At some point we
// should remove this need and make the runtime routine entry code
// smarter.
- movq(rax, Immediate(num_arguments));
+ Set(rax, num_arguments);
movq(rbx, ExternalReference(f));
CEntryStub ces(f->result_size);
CallStub(&ces);
@@ -360,7 +360,7 @@
void MacroAssembler::CallExternalReference(const ExternalReference& ext,
int num_arguments) {
- movq(rax, Immediate(num_arguments));
+ Set(rax, num_arguments);
movq(rbx, ext);
CEntryStub stub(1);
@@ -382,7 +382,7 @@
// arguments passed in because it is constant. At some point we
// should remove this need and make the runtime routine entry code
// smarter.
- movq(rax, Immediate(num_arguments));
+ Set(rax, num_arguments);
JumpToExternalReference(ext, result_size);
}
@@ -640,9 +640,9 @@
if (first.is(second)) {
return CheckSmi(first);
}
- movl(kScratchRegister, first);
- orl(kScratchRegister, second);
- testb(kScratchRegister, Immediate(kSmiTagMask));
+ ASSERT(kSmiTag == 0 && kHeapObjectTag == 1 && kHeapObjectTagMask == 3);
+ leal(kScratchRegister, Operand(first, second, times_1, 0));
+ testb(kScratchRegister, Immediate(0x03));
return zero;
}
@@ -1937,7 +1937,7 @@
if (expected.immediate() == actual.immediate()) {
definitely_matches = true;
} else {
- movq(rax, Immediate(actual.immediate()));
+ Set(rax, actual.immediate());
if (expected.immediate() ==
SharedFunctionInfo::kDontAdaptArgumentsSentinel) {
// Don't worry about adapting arguments for built-ins that
@@ -1946,7 +1946,7 @@
// arguments.
definitely_matches = true;
} else {
- movq(rbx, Immediate(expected.immediate()));
+ Set(rbx, expected.immediate());
}
}
} else {
@@ -1957,7 +1957,7 @@
cmpq(expected.reg(), Immediate(actual.immediate()));
j(equal, &invoke);
ASSERT(expected.reg().is(rbx));
- movq(rax, Immediate(actual.immediate()));
+ Set(rax, actual.immediate());
} else if (!expected.reg().is(actual.reg())) {
// Both expected and actual are in (different) registers. This
// is the case when we invoke functions using call and apply.
=======================================
--- /branches/bleeding_edge/src/x64/virtual-frame-x64.cc Thu Jun 24
02:03:49 2010
+++ /branches/bleeding_edge/src/x64/virtual-frame-x64.cc Tue Jun 29
07:03:11 2010
@@ -1221,7 +1221,7 @@
// call trampolines per different arguments counts encountered.
Result num_args = cgen()->allocator()->Allocate(rax);
ASSERT(num_args.is_valid());
- __ movq(num_args.reg(), Immediate(arg_count));
+ __ Set(num_args.reg(), arg_count);
function.Unuse();
num_args.Unuse();
--
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