drive-by comments.
http://codereview.chromium.org/3169050/diff/15001/16001 File src/ia32/codegen-ia32.cc (right): http://codereview.chromium.org/3169050/diff/15001/16001#newcode5334 src/ia32/codegen-ia32.cc:5334: __ xor_(Operand(esp, 0), Immediate(jit_cookie_)); Interleaving stack oprations (e.g. push/pop) with esp relative addressing causes extra latency between the operations (on at least the intel core architecture). If there is any way to do the computation in a register and then push it afterwards, there is a chance it would still be faster, and parallelize better if there are more unsafe smi pushes in a row. I needs a scratch register, though. http://codereview.chromium.org/3169050/diff/15001/16001#newcode5351 src/ia32/codegen-ia32.cc:5351: __ lea(target, Operand(target, jit_cookie_)); I don't think we should start depending on this macro not changing flags. It might change later. And it doesn't even hold now, since Set might use xor if the value is zero. http://codereview.chromium.org/3169050/show -- v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev
