LGTM
http://codereview.chromium.org/3357022/diff/9001/7002 File src/arm/full-codegen-arm.cc (right): http://codereview.chromium.org/3357022/diff/9001/7002#newcode900 src/arm/full-codegen-arm.cc:900: // Walk the rest of the chain using a single register without delete "using a single register" http://codereview.chromium.org/3357022/diff/9001/7002#newcode901 src/arm/full-codegen-arm.cc:901: // clobbering esi. esi -> cp http://codereview.chromium.org/3357022/diff/9001/7002#newcode933 src/arm/full-codegen-arm.cc:933: if (potential_slot->var()->mode() == Variable::CONST) { Line 1071 below could use the same pattern (a conditional LoadRoot instead a jump around it). http://codereview.chromium.org/3357022/diff/9001/7002#newcode1819 src/arm/full-codegen-arm.cc:1819: __ CallRuntime(Runtime::kLoadContextSlot, 2); Maybe change these two pushes to Push(r0, r1). It cannot generate an stm instruction in this case, but anyway. http://codereview.chromium.org/3357022/diff/9001/7002#newcode1834 src/arm/full-codegen-arm.cc:1834: __ ldr(r1, FieldMemOperand(r1, GlobalObject::kGlobalReceiverOffset)); Maybe change to Push(r0, r1), or even better have EmitDynamicLoadFromSlotFastCase return result in r1 and load global receiver in r0 to use Push(r1, r0) which will generate an stm instruction. http://codereview.chromium.org/3357022/diff/9001/7006 File src/x64/full-codegen-x64.cc (right): http://codereview.chromium.org/3357022/diff/9001/7006#newcode964 src/x64/full-codegen-x64.cc:964: // clobbering esi. esi -> rsi http://codereview.chromium.org/3357022/show -- v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev
