Revision: 5928
Author: [email protected]
Date: Tue Dec 7 04:21:26 2010
Log: Fix ARM build.
Review URL: http://codereview.chromium.org/5638003
http://code.google.com/p/v8/source/detail?r=5928
Modified:
/branches/bleeding_edge/src/platform-linux.cc
=======================================
--- /branches/bleeding_edge/src/platform-linux.cc Tue Dec 7 03:31:57 2010
+++ /branches/bleeding_edge/src/platform-linux.cc Tue Dec 7 04:21:26 2010
@@ -186,21 +186,10 @@
}
-#ifdef V8_TARGET_ARCH_ARM
-// 0xffff0fa0 is the hard coded address of a function provided by
-// the kernel which implements a memory barrier. On older
-// ARM architecture revisions (pre-v6) this may be implemented using
-// a syscall. This address is stable, and in active use (hard coded)
-// by at least glibc-2.7 and the Android C library.
-typedef void (*LinuxKernelMemoryBarrierFunc)(void);
-LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier
__attribute__((weak)) =
- (LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
-#endif
-
void OS::ReleaseStore(volatile AtomicWord* ptr, AtomicWord value) {
#if defined(V8_TARGET_ARCH_ARM) && defined(__arm__)
// Only use on ARM hardware.
- pLinuxKernelMemoryBarrier();
+ MemoryBarrier();
#else
__asm__ __volatile__("" : : : "memory");
// An x86 store acts as a release barrier.
--
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