http://codereview.chromium.org/6142004/

<http://codereview.chromium.org/6142004/>Patch uploaded.

On Thu, Jan 6, 2011 at 10:42 AM, <[email protected]> wrote:

>
> Comment #3 on issue 1023 by alexandre.rames: NaN is interpreted as true in
> conditionals on ARM with crankshaft
>
> http://code.google.com/p/v8/issues/detail?id=1023
>
> The fix here is quite easy. Provided that the vcmp before has the E bit
> (bit 8) set and invalid exception are enabled, it will raise an invalid
> exception if the operand is NaN.
>
> However we need to make sure the Invalid Exception is enabled. This is not
> the first time we need to make sure such checks.
> I'll first create a patch where we locally enable it, but we should later
> try to make sure that all these are always enabled in the generated code.
> (FPSCR bits 8-12 and 15 sets)
>
>
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>

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