Revision: 6405
Author: [email protected]
Date: Wed Jan 19 07:39:40 2011
Log: Fix the ARM simulator's stop support and add conditional breakpoint.

BUG=none
TEST=none

Review URL: http://codereview.chromium.org/6346009
http://code.google.com/p/v8/source/detail?r=6405

Modified:
 /branches/bleeding_edge/src/arm/assembler-arm.cc
 /branches/bleeding_edge/src/arm/constants-arm.h
 /branches/bleeding_edge/src/arm/simulator-arm.cc

=======================================
--- /branches/bleeding_edge/src/arm/assembler-arm.cc Mon Jan 17 04:45:39 2011 +++ /branches/bleeding_edge/src/arm/assembler-arm.cc Wed Jan 19 07:39:40 2011
@@ -1656,8 +1656,14 @@
   emit(reinterpret_cast<Instr>(msg));
 #else  // def __arm__
 #ifdef CAN_USE_ARMV5_INSTRUCTIONS
-  ASSERT(cond == al);
-  bkpt(0);
+  if (cond != al) {
+    Label skip;
+    b(&skip, NegateCondition(cond));
+    bkpt(0);
+    bind(&skip);
+  } else {
+    bkpt(0);
+  }
 #else  // ndef CAN_USE_ARMV5_INSTRUCTIONS
   svc(0x9f0001, cond);
 #endif  // ndef CAN_USE_ARMV5_INSTRUCTIONS
=======================================
--- /branches/bleeding_edge/src/arm/constants-arm.h     Tue Dec  7 03:01:02 2010
+++ /branches/bleeding_edge/src/arm/constants-arm.h     Wed Jan 19 07:39:40 2011
@@ -351,6 +351,11 @@
                                            && (Bit(23) == 0)
                                            && (Bit(20) == 0)
                                            && ((Bit(7) == 0)); }
+
+  // Test for a stop instruction.
+  inline bool IsStop() const {
+    return (TypeField() == 7) && (Bit(24) == 1) && (SvcField() >= stop);
+  }

   // Special accessors that test for existence of a value.
   inline bool HasS()    const { return SField() == 1; }
=======================================
--- /branches/bleeding_edge/src/arm/simulator-arm.cc Wed Jan 19 06:53:38 2011 +++ /branches/bleeding_edge/src/arm/simulator-arm.cc Wed Jan 19 07:39:40 2011
@@ -455,7 +455,7 @@
         PrintF("DIV BY ZERO flag: %d; ", sim_->div_zero_vfp_flag_);
         PrintF("OVERFLOW flag: %d; ", sim_->overflow_vfp_flag_);
         PrintF("UNDERFLOW flag: %d; ", sim_->underflow_vfp_flag_);
-        PrintF("INEXACT flag: %d; ", sim_->inexact_vfp_flag_);
+        PrintF("INEXACT flag: %d;\n", sim_->inexact_vfp_flag_);
       } else if (strcmp(cmd, "stop") == 0) {
         int32_t value;
         intptr_t stop_pc = sim_->get_pc() - 2 * Instr::kInstrSize;
@@ -2907,6 +2907,10 @@
         break;
       }
     }
+ // If the instruction is a non taken conditional stop, we need to skip the
+  // inlined message address.
+  } else if (instr->IsStop()) {
+    set_pc(get_pc() + 2 * Instr::kInstrSize);
   }
   if (!pc_modified_) {
     set_register(pc, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize);

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