Reviewers: Vyacheslav Egorov,
Description:
Fix incorrect assumption on bit-and on ARM
Please review this at http://codereview.chromium.org/6696037/
SVN Base: http://v8.googlecode.com/svn/branches/bleeding_edge/
Affected files:
M src/arm/codegen-arm.cc
M test/mjsunit/bitops-info.js
Index: src/arm/codegen-arm.cc
===================================================================
--- src/arm/codegen-arm.cc (revision 7178)
+++ src/arm/codegen-arm.cc (working copy)
@@ -1159,7 +1159,7 @@
}
// Check that the *signed* result fits in a smi. Not necessary for AND,
SAR
// if the shift if more than 0 or SHR if the shit is more than 1.
- if (!( (op_ == Token::AND) ||
+ if (!( (op_ == Token::AND && value_ >= 0) ||
((op_ == Token::SAR) && (shift_value > 0)) ||
((op_ == Token::SHR) && (shift_value > 1)))) {
__ add(r3, int32, Operand(0x40000000), SetCC);
@@ -1420,8 +1420,10 @@
default: UNREACHABLE();
}
deferred->BindExit();
- TypeInfo result_type =
- (op == Token::BIT_AND) ? TypeInfo::Smi() :
TypeInfo::Integer32();
+ TypeInfo result_type = TypeInfo::Integer32();
+ if (op == Token::BIT_AND && int_value >= 0) {
+ result_type = TypeInfo::Smi();
+ }
frame_->EmitPush(tos, result_type);
}
break;
Index: test/mjsunit/bitops-info.js
===================================================================
--- test/mjsunit/bitops-info.js (revision 7178)
+++ test/mjsunit/bitops-info.js (working copy)
@@ -37,8 +37,12 @@
return 1600822924; // It's a signed Int32.
}
+function hidden_negative_smi() {
+ var w = -0x20123456; // A negative smi.
+}
function f() {
+ var w = hidden_negative_smi(); // Not a constant.
var x = non_int32(); // Not a constant.
var y = hidden_smi(); // Not a constant.
var z = hidden_int32();
@@ -66,7 +70,15 @@
assertEquals(46512102 & 2600822924, x & y, "10rev");
assertEquals(1600822924 & 2600822924, x & z, "11rev");
+ assertEquals((46512102 & -0x20123456) | 1, (y & -0x20123456) | 1, "12");
+ assertEquals((1600822924 & -0x20123456) | 1, (z & -0x20123456) |
1, "13");
+ assertEquals((2600822924 & -0x20123456) | 1, (x & -0x20123456) |
1, "14");
+ assertEquals((46512102 & -0x20123456) | 1, (-0x20123456 & y) |
1, "12rev");
+ assertEquals((1600822924 & -0x20123456) | 1, (-0x20123456 & z) |
1, "13rev");
+ assertEquals((2600822924 & -0x20123456) | 1, (-0x20123456 & x) |
1, "14rev");
+
assertEquals(2600822924 & 2600822924, x & x, "xx");
+ assertEquals(2600822924 & 2600822924, x & x, "xx");
assertEquals(y, y & y, "yy");
assertEquals(z, z & z, "zz");
}
--
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