Revision: 7508
Author: [email protected]
Date: Wed Apr 6 01:41:28 2011
Log: Remove unused last_pc_ in AssemblerX64.
Remove unneeded checks for SSE2 in X64 code.
Remove an unneeded check for SSE3 where the X64 code doesn't use SSE3
features.
Review URL: http://codereview.chromium.org/6793040
http://code.google.com/p/v8/source/detail?r=7508
Modified:
/branches/bleeding_edge/src/x64/assembler-x64.cc
/branches/bleeding_edge/src/x64/assembler-x64.h
/branches/bleeding_edge/src/x64/code-stubs-x64.cc
/branches/bleeding_edge/src/x64/deoptimizer-x64.cc
/branches/bleeding_edge/src/x64/lithium-x64.cc
/branches/bleeding_edge/src/x64/macro-assembler-x64.cc
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.cc Fri Apr 1 06:48:10
2011
+++ /branches/bleeding_edge/src/x64/assembler-x64.cc Wed Apr 6 01:41:28
2011
@@ -388,7 +388,6 @@
pc_ = buffer_;
reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
- last_pc_ = NULL;
#ifdef GENERATED_CODE_COVERAGE
InitCoverageLog();
@@ -444,7 +443,6 @@
void Assembler::bind_to(Label* L, int pos) {
ASSERT(!L->is_bound()); // Label may only be bound once.
- last_pc_ = NULL;
ASSERT(0 <= pos && pos <= pc_offset()); // Position must be valid.
if (L->is_linked()) {
int current = L->pos();
@@ -471,7 +469,6 @@
void Assembler::bind(NearLabel* L) {
ASSERT(!L->is_bound());
- last_pc_ = NULL;
while (L->unresolved_branches_ > 0) {
int branch_pos = L->unresolved_positions_[L->unresolved_branches_ - 1];
int disp = pc_offset() - branch_pos;
@@ -532,9 +529,6 @@
buffer_ = desc.buffer;
buffer_size_ = desc.buffer_size;
pc_ += pc_delta;
- if (last_pc_ != NULL) {
- last_pc_ += pc_delta;
- }
reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
reloc_info_writer.last_pc() + pc_delta);
@@ -572,7 +566,6 @@
void Assembler::arithmetic_op(byte opcode, Register reg, const Operand&
op) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(reg, op);
emit(opcode);
emit_operand(reg, op);
@@ -581,7 +574,6 @@
void Assembler::arithmetic_op(byte opcode, Register reg, Register rm_reg) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT((opcode & 0xC6) == 2);
if (rm_reg.low_bits() == 4) { // Forces SIB byte.
// Swap reg and rm_reg and change opcode operand order.
@@ -598,7 +590,6 @@
void Assembler::arithmetic_op_16(byte opcode, Register reg, Register
rm_reg) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT((opcode & 0xC6) == 2);
if (rm_reg.low_bits() == 4) { // Forces SIB byte.
// Swap reg and rm_reg and change opcode operand order.
@@ -619,7 +610,6 @@
Register reg,
const Operand& rm_reg) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x66);
emit_optional_rex_32(reg, rm_reg);
emit(opcode);
@@ -629,7 +619,6 @@
void Assembler::arithmetic_op_32(byte opcode, Register reg, Register
rm_reg) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT((opcode & 0xC6) == 2);
if (rm_reg.low_bits() == 4) { // Forces SIB byte.
// Swap reg and rm_reg and change opcode operand order.
@@ -648,7 +637,6 @@
Register reg,
const Operand& rm_reg) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(reg, rm_reg);
emit(opcode);
emit_operand(reg, rm_reg);
@@ -659,7 +647,6 @@
Register dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
if (is_int8(src.value_)) {
emit(0x83);
@@ -679,7 +666,6 @@
const Operand& dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
if (is_int8(src.value_)) {
emit(0x83);
@@ -697,7 +683,6 @@
Register dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x66); // Operand size override prefix.
emit_optional_rex_32(dst);
if (is_int8(src.value_)) {
@@ -719,7 +704,6 @@
const Operand& dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x66); // Operand size override prefix.
emit_optional_rex_32(dst);
if (is_int8(src.value_)) {
@@ -738,7 +722,6 @@
Register dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
if (is_int8(src.value_)) {
emit(0x83);
@@ -759,7 +742,6 @@
const Operand& dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
if (is_int8(src.value_)) {
emit(0x83);
@@ -777,7 +759,6 @@
const Operand& dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
ASSERT(is_int8(src.value_) || is_uint8(src.value_));
emit(0x80);
@@ -790,7 +771,6 @@
Register dst,
Immediate src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (dst.code() > 3) {
// Use 64-bit mode byte registers.
emit_rex_64(dst);
@@ -804,7 +784,6 @@
void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(is_uint6(shift_amount.value_)); // illegal shift count
if (shift_amount.value_ == 1) {
emit_rex_64(dst);
@@ -821,7 +800,6 @@
void Assembler::shift(Register dst, int subcode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xD3);
emit_modrm(subcode, dst);
@@ -830,7 +808,6 @@
void Assembler::shift_32(Register dst, int subcode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xD3);
emit_modrm(subcode, dst);
@@ -839,7 +816,6 @@
void Assembler::shift_32(Register dst, Immediate shift_amount, int
subcode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(is_uint5(shift_amount.value_)); // illegal shift count
if (shift_amount.value_ == 1) {
emit_optional_rex_32(dst);
@@ -856,7 +832,6 @@
void Assembler::bt(const Operand& dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src, dst);
emit(0x0F);
emit(0xA3);
@@ -866,7 +841,6 @@
void Assembler::bts(const Operand& dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src, dst);
emit(0x0F);
emit(0xAB);
@@ -877,7 +851,6 @@
void Assembler::call(Label* L) {
positions_recorder()->WriteRecordedPositions();
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// 1110 1000 #32-bit disp.
emit(0xE8);
if (L->is_bound()) {
@@ -899,7 +872,6 @@
void Assembler::call(Handle<Code> target, RelocInfo::Mode rmode) {
positions_recorder()->WriteRecordedPositions();
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// 1110 1000 #32-bit disp.
emit(0xE8);
emit_code_target(target, rmode);
@@ -909,7 +881,6 @@
void Assembler::call(Register adr) {
positions_recorder()->WriteRecordedPositions();
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode: FF /2 r64.
emit_optional_rex_32(adr);
emit(0xFF);
@@ -920,7 +891,6 @@
void Assembler::call(const Operand& op) {
positions_recorder()->WriteRecordedPositions();
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode: FF /2 m64.
emit_optional_rex_32(op);
emit(0xFF);
@@ -935,7 +905,6 @@
void Assembler::call(Address target) {
positions_recorder()->WriteRecordedPositions();
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// 1110 1000 #32-bit disp.
emit(0xE8);
Address source = pc_ + 4;
@@ -947,19 +916,16 @@
void Assembler::clc() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xF8);
}
void Assembler::cld() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xFC);
}
void Assembler::cdq() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x99);
}
@@ -974,7 +940,6 @@
// 64-bit architecture.
ASSERT(cc >= 0); // Use mov for unconditional moves.
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode: REX.W 0f 40 + cc /r.
emit_rex_64(dst, src);
emit(0x0f);
@@ -991,7 +956,6 @@
}
ASSERT(cc >= 0);
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode: REX.W 0f 40 + cc /r.
emit_rex_64(dst, src);
emit(0x0f);
@@ -1008,7 +972,6 @@
}
ASSERT(cc >= 0);
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode: 0f 40 + cc /r.
emit_optional_rex_32(dst, src);
emit(0x0f);
@@ -1025,7 +988,6 @@
}
ASSERT(cc >= 0);
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode: 0f 40 + cc /r.
emit_optional_rex_32(dst, src);
emit(0x0f);
@@ -1037,7 +999,6 @@
void Assembler::cmpb_al(Immediate imm8) {
ASSERT(is_int8(imm8.value_) || is_uint8(imm8.value_));
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x3c);
emit(imm8.value_);
}
@@ -1046,7 +1007,6 @@
void Assembler::cpuid() {
ASSERT(CpuFeatures::IsEnabled(CPUID));
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x0F);
emit(0xA2);
}
@@ -1054,7 +1014,6 @@
void Assembler::cqo() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64();
emit(0x99);
}
@@ -1062,7 +1021,6 @@
void Assembler::decq(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xFF);
emit_modrm(0x1, dst);
@@ -1071,7 +1029,6 @@
void Assembler::decq(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xFF);
emit_operand(1, dst);
@@ -1080,7 +1037,6 @@
void Assembler::decl(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xFF);
emit_modrm(0x1, dst);
@@ -1089,7 +1045,6 @@
void Assembler::decl(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xFF);
emit_operand(1, dst);
@@ -1098,7 +1053,6 @@
void Assembler::decb(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (dst.code() > 3) {
// Register is not one of al, bl, cl, dl. Its encoding needs REX.
emit_rex_32(dst);
@@ -1110,7 +1064,6 @@
void Assembler::decb(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xFE);
emit_operand(1, dst);
@@ -1119,7 +1072,6 @@
void Assembler::enter(Immediate size) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xC8);
emitw(size.value_); // 16 bit operand, always.
emit(0);
@@ -1128,14 +1080,12 @@
void Assembler::hlt() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xF4);
}
void Assembler::idivq(Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src);
emit(0xF7);
emit_modrm(0x7, src);
@@ -1144,7 +1094,6 @@
void Assembler::idivl(Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(src);
emit(0xF7);
emit_modrm(0x7, src);
@@ -1153,7 +1102,6 @@
void Assembler::imul(Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src);
emit(0xF7);
emit_modrm(0x5, src);
@@ -1162,7 +1110,6 @@
void Assembler::imul(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x0F);
emit(0xAF);
@@ -1172,7 +1119,6 @@
void Assembler::imul(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x0F);
emit(0xAF);
@@ -1182,7 +1128,6 @@
void Assembler::imul(Register dst, Register src, Immediate imm) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
if (is_int8(imm.value_)) {
emit(0x6B);
@@ -1198,7 +1143,6 @@
void Assembler::imull(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xAF);
@@ -1208,7 +1152,6 @@
void Assembler::imull(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xAF);
@@ -1218,7 +1161,6 @@
void Assembler::imull(Register dst, Register src, Immediate imm) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
if (is_int8(imm.value_)) {
emit(0x6B);
@@ -1234,7 +1176,6 @@
void Assembler::incq(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xFF);
emit_modrm(0x0, dst);
@@ -1243,7 +1184,6 @@
void Assembler::incq(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xFF);
emit_operand(0, dst);
@@ -1252,7 +1192,6 @@
void Assembler::incl(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xFF);
emit_operand(0, dst);
@@ -1261,7 +1200,6 @@
void Assembler::incl(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xFF);
emit_modrm(0, dst);
@@ -1270,7 +1208,6 @@
void Assembler::int3() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xCC);
}
@@ -1283,7 +1220,6 @@
return;
}
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(is_uint4(cc));
if (L->is_bound()) {
const int short_size = 2;
@@ -1321,7 +1257,6 @@
Handle<Code> target,
RelocInfo::Mode rmode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(is_uint4(cc));
// 0000 1111 1000 tttn #32-bit disp.
emit(0x0F);
@@ -1332,7 +1267,6 @@
void Assembler::j(Condition cc, NearLabel* L, Hint hint) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(0 <= cc && cc < 16);
if (FLAG_emit_branch_hints && hint != no_hint) emit(hint);
if (L->is_bound()) {
@@ -1353,7 +1287,6 @@
void Assembler::jmp(Label* L) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
const int short_size = sizeof(int8_t);
const int long_size = sizeof(int32_t);
if (L->is_bound()) {
@@ -1386,7 +1319,6 @@
void Assembler::jmp(Handle<Code> target, RelocInfo::Mode rmode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// 1110 1001 #32-bit disp.
emit(0xE9);
emit_code_target(target, rmode);
@@ -1395,7 +1327,6 @@
void Assembler::jmp(NearLabel* L) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (L->is_bound()) {
const int short_size = sizeof(int8_t);
int offs = L->pos() - pc_offset();
@@ -1414,7 +1345,6 @@
void Assembler::jmp(Register target) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode FF/4 r64.
emit_optional_rex_32(target);
emit(0xFF);
@@ -1424,7 +1354,6 @@
void Assembler::jmp(const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
// Opcode FF/4 m64.
emit_optional_rex_32(src);
emit(0xFF);
@@ -1434,7 +1363,6 @@
void Assembler::lea(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x8D);
emit_operand(dst, src);
@@ -1443,7 +1371,6 @@
void Assembler::leal(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x8D);
emit_operand(dst, src);
@@ -1452,7 +1379,6 @@
void Assembler::load_rax(void* value, RelocInfo::Mode mode) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x48); // REX.W
emit(0xA1);
emitq(reinterpret_cast<uintptr_t>(value), mode);
@@ -1466,14 +1392,12 @@
void Assembler::leave() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xC9);
}
void Assembler::movb(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_32(dst, src);
emit(0x8A);
emit_operand(dst, src);
@@ -1482,7 +1406,6 @@
void Assembler::movb(Register dst, Immediate imm) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_32(dst);
emit(0xC6);
emit_modrm(0x0, dst);
@@ -1492,7 +1415,6 @@
void Assembler::movb(const Operand& dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_32(src, dst);
emit(0x88);
emit_operand(src, dst);
@@ -1501,7 +1423,6 @@
void Assembler::movw(const Operand& dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x66);
emit_optional_rex_32(src, dst);
emit(0x89);
@@ -1511,7 +1432,6 @@
void Assembler::movl(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x8B);
emit_operand(dst, src);
@@ -1520,7 +1440,6 @@
void Assembler::movl(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (src.low_bits() == 4) {
emit_optional_rex_32(src, dst);
emit(0x89);
@@ -1535,7 +1454,6 @@
void Assembler::movl(const Operand& dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(src, dst);
emit(0x89);
emit_operand(src, dst);
@@ -1544,7 +1462,6 @@
void Assembler::movl(const Operand& dst, Immediate value) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xC7);
emit_operand(0x0, dst);
@@ -1554,7 +1471,6 @@
void Assembler::movl(Register dst, Immediate value) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xC7);
emit_modrm(0x0, dst);
@@ -1564,7 +1480,6 @@
void Assembler::movq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x8B);
emit_operand(dst, src);
@@ -1573,7 +1488,6 @@
void Assembler::movq(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (src.low_bits() == 4) {
emit_rex_64(src, dst);
emit(0x89);
@@ -1588,7 +1502,6 @@
void Assembler::movq(Register dst, Immediate value) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xC7);
emit_modrm(0x0, dst);
@@ -1598,7 +1511,6 @@
void Assembler::movq(const Operand& dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src, dst);
emit(0x89);
emit_operand(src, dst);
@@ -1610,7 +1522,6 @@
// address is not GC safe. Use the handle version instead.
ASSERT(rmode > RelocInfo::LAST_GCED_ENUM);
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xB8 | dst.low_bits());
emitq(reinterpret_cast<uintptr_t>(value), rmode);
@@ -1632,7 +1543,6 @@
// value.
}
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xB8 | dst.low_bits());
emitq(value, rmode);
@@ -1647,7 +1557,6 @@
void Assembler::movq(const Operand& dst, Immediate value) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xC7);
emit_operand(0, dst);
@@ -1659,7 +1568,6 @@
// (as a 32-bit offset sign extended to 64-bit).
void Assembler::movl(const Operand& dst, Label* src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xC7);
emit_operand(0, dst);
@@ -1689,7 +1597,6 @@
movq(dst, reinterpret_cast<int64_t>(*value), RelocInfo::NONE);
} else {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(value->IsHeapObject());
ASSERT(!HEAP->InNewSpace(*value));
emit_rex_64(dst);
@@ -1701,7 +1608,6 @@
void Assembler::movsxbq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x0F);
emit(0xBE);
@@ -1711,7 +1617,6 @@
void Assembler::movsxwq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x0F);
emit(0xBF);
@@ -1721,7 +1626,6 @@
void Assembler::movsxlq(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x63);
emit_modrm(dst, src);
@@ -1730,7 +1634,6 @@
void Assembler::movsxlq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst, src);
emit(0x63);
emit_operand(dst, src);
@@ -1739,7 +1642,6 @@
void Assembler::movzxbq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xB6);
@@ -1749,7 +1651,6 @@
void Assembler::movzxbl(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xB6);
@@ -1759,7 +1660,6 @@
void Assembler::movzxwq(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xB7);
@@ -1769,7 +1669,6 @@
void Assembler::movzxwl(Register dst, const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0xB7);
@@ -1779,7 +1678,6 @@
void Assembler::repmovsb() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xF3);
emit(0xA4);
}
@@ -1787,7 +1685,6 @@
void Assembler::repmovsw() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x66); // Operand size override.
emit(0xF3);
emit(0xA4);
@@ -1796,7 +1693,6 @@
void Assembler::repmovsl() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xF3);
emit(0xA5);
}
@@ -1804,7 +1700,6 @@
void Assembler::repmovsq() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0xF3);
emit_rex_64();
emit(0xA5);
@@ -1813,7 +1708,6 @@
void Assembler::mul(Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src);
emit(0xF7);
emit_modrm(0x4, src);
@@ -1822,7 +1716,6 @@
void Assembler::neg(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xF7);
emit_modrm(0x3, dst);
@@ -1831,7 +1724,6 @@
void Assembler::negl(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xF7);
emit_modrm(0x3, dst);
@@ -1840,7 +1732,6 @@
void Assembler::neg(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xF7);
emit_operand(3, dst);
@@ -1849,14 +1740,12 @@
void Assembler::nop() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x90);
}
void Assembler::not_(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xF7);
emit_modrm(0x2, dst);
@@ -1865,7 +1754,6 @@
void Assembler::not_(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(dst);
emit(0xF7);
emit_operand(2, dst);
@@ -1874,7 +1762,6 @@
void Assembler::notl(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0xF7);
emit_modrm(0x2, dst);
@@ -1899,7 +1786,6 @@
ASSERT(1 <= n);
ASSERT(n <= 9);
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
switch (n) {
case 1:
emit(0x90);
@@ -1970,7 +1856,6 @@
void Assembler::pop(Register dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0x58 | dst.low_bits());
}
@@ -1978,7 +1863,6 @@
void Assembler::pop(const Operand& dst) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(dst);
emit(0x8F);
emit_operand(0, dst);
@@ -1987,14 +1871,12 @@
void Assembler::popfq() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x9D);
}
void Assembler::push(Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(src);
emit(0x50 | src.low_bits());
}
@@ -2002,7 +1884,6 @@
void Assembler::push(const Operand& src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_optional_rex_32(src);
emit(0xFF);
emit_operand(6, src);
@@ -2011,7 +1892,6 @@
void Assembler::push(Immediate value) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (is_int8(value.value_)) {
emit(0x6A);
emit(value.value_); // Emit low byte of value.
@@ -2024,7 +1904,6 @@
void Assembler::push_imm32(int32_t imm32) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x68);
emitl(imm32);
}
@@ -2032,14 +1911,12 @@
void Assembler::pushfq() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x9C);
}
void Assembler::rdtsc() {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit(0x0F);
emit(0x31);
}
@@ -2047,7 +1924,6 @@
void Assembler::ret(int imm16) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(is_uint16(imm16));
if (imm16 == 0) {
emit(0xC3);
@@ -2065,7 +1941,6 @@
return;
}
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
ASSERT(is_uint4(cc));
if (reg.code() > 3) { // Use x64 byte registers, where different.
emit_rex_32(reg);
@@ -2078,7 +1953,6 @@
void Assembler::shld(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src, dst);
emit(0x0F);
emit(0xA5);
@@ -2088,7 +1962,6 @@
void Assembler::shrd(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
emit_rex_64(src, dst);
emit(0x0F);
emit(0xAD);
@@ -2098,7 +1971,6 @@
void Assembler::xchg(Register dst, Register src) {
EnsureSpace ensure_space(this);
- last_pc_ = pc_;
if (src.is(rax) || dst.is(rax)) { // Single-byte encoding
***The diff for this file has been truncated for email.***
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.h Fri Apr 1 06:27:28 2011
+++ /branches/bleeding_edge/src/x64/assembler-x64.h Wed Apr 6 01:41:28 2011
@@ -1589,8 +1589,6 @@
RelocInfoWriter reloc_info_writer;
List< Handle<Code> > code_targets_;
- // push-pop elimination
- byte* last_pc_;
PositionsRecorder positions_recorder_;
=======================================
--- /branches/bleeding_edge/src/x64/code-stubs-x64.cc Fri Apr 1 06:27:28
2011
+++ /branches/bleeding_edge/src/x64/code-stubs-x64.cc Wed Apr 6 01:41:28
2011
@@ -2961,8 +2961,6 @@
times_1,
FixedArray::kHeaderSize));
__ JumpIfSmi(probe, not_found);
- ASSERT(CpuFeatures::IsSupported(SSE2));
- CpuFeatures::Scope fscope(SSE2);
__ movsd(xmm0, FieldOperand(object, HeapNumber::kValueOffset));
__ movsd(xmm1, FieldOperand(probe, HeapNumber::kValueOffset));
__ ucomisd(xmm0, xmm1);
=======================================
--- /branches/bleeding_edge/src/x64/deoptimizer-x64.cc Fri Apr 1 06:27:28
2011
+++ /branches/bleeding_edge/src/x64/deoptimizer-x64.cc Wed Apr 6 01:41:28
2011
@@ -600,7 +600,6 @@
void Deoptimizer::EntryGenerator::Generate() {
GeneratePrologue();
- CpuFeatures::Scope scope(SSE2);
// Save all general purpose registers before messing with them.
const int kNumberOfRegisters = Register::kNumRegisters;
=======================================
--- /branches/bleeding_edge/src/x64/lithium-x64.cc Tue Apr 5 02:55:18 2011
+++ /branches/bleeding_edge/src/x64/lithium-x64.cc Wed Apr 6 01:41:28 2011
@@ -1613,10 +1613,8 @@
LOperand* value = UseRegister(instr->value());
bool needs_check = !instr->value()->type().IsSmi();
if (needs_check) {
- LOperand* xmm_temp =
- (instr->CanTruncateToInt32() && CpuFeatures::IsSupported(SSE3))
- ? NULL
- : FixedTemp(xmm1);
+ LOperand* xmm_temp = instr->CanTruncateToInt32() ? NULL
+ : FixedTemp(xmm1);
LTaggedToI* res = new LTaggedToI(value, xmm_temp);
return AssignEnvironment(DefineSameAsFirst(res));
} else {
=======================================
--- /branches/bleeding_edge/src/x64/macro-assembler-x64.cc Fri Apr 1
08:37:59 2011
+++ /branches/bleeding_edge/src/x64/macro-assembler-x64.cc Wed Apr 6
01:41:28 2011
@@ -2202,7 +2202,6 @@
#endif
// Optionally save all XMM registers.
if (save_doubles) {
- CpuFeatures::Scope scope(SSE2);
int space = XMMRegister::kNumRegisters * kDoubleSize +
arg_stack_space * kPointerSize;
subq(rsp, Immediate(space));
--
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