[v8-dev] [v8] r8405 committed - MIPS: port Add missing write barrier for arguments store ICs....

Fri, 24 Jun 2011 01:47:56 -0700 

Revision: 8405
Author:   [email protected]
Date:     Fri Jun 24 01:46:57 2011
Log:      MIPS: port Add missing write barrier for arguments store ICs.

Ported r8390 (52d4605)

BUG=
TEST=

Review URL: http://codereview.chromium.org//7238020
Patch from Paul Lind <[email protected]>.
http://code.google.com/p/v8/source/detail?r=8405

Modified:
 /branches/bleeding_edge/src/mips/ic-mips.cc

=======================================
--- /branches/bleeding_edge/src/mips/ic-mips.cc Wed Jun 22 00:48:32 2011
+++ /branches/bleeding_edge/src/mips/ic-mips.cc Fri Jun 24 01:46:57 2011
@@ -1006,6 +1006,8 @@
   MemOperand mapped_location =
GenerateMappedArgumentsLookup(masm, a2, a1, a3, t0, t1, &notin, &slow); 
   __ sw(a0, mapped_location);
+  __ Addu(t2, a3, t1);
+  __ RecordWrite(a3, t2, t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&notin);
@@ -1013,6 +1015,8 @@
   MemOperand unmapped_location =
       GenerateUnmappedArgumentsLookup(masm, a1, a3, t0, &slow);
   __ sw(a0, unmapped_location);
+  __ Addu(t2, a3, t0);
+  __ RecordWrite(a3, t2, t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&slow);

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