Reviewers: Mads Ager,

Description:
Merge r8357 to 3.2 branch

r8357: ARM: Fix context save/restore for VFP registers.

[email protected]

BUG=none
TEST=none

Please review this at http://codereview.chromium.org/7241020/

SVN Base: http://v8.googlecode.com/svn/branches/3.2/

Affected files:
  M     src/arm/assembler-arm.h
  M     src/arm/code-stubs-arm.cc
  M     src/arm/frames-arm.h
  M     src/version.cc


Index: src/arm/assembler-arm.h
===================================================================
--- src/arm/assembler-arm.h     (revision 8405)
+++ src/arm/assembler-arm.h     (working copy)
@@ -302,7 +302,11 @@
 const DwVfpRegister d14 = { 14 };
 const DwVfpRegister d15 = { 15 };

+// Aliases for double registers.
+const DwVfpRegister kFirstCalleeSavedDoubleReg = d8;
+const DwVfpRegister kLastCalleeSavedDoubleReg = d15;

+
 // Coprocessor register
 struct CRegister {
   bool is_valid() const { return 0 <= code_ && code_ < 16; }
Index: src/arm/code-stubs-arm.cc
===================================================================
--- src/arm/code-stubs-arm.cc   (revision 8405)
+++ src/arm/code-stubs-arm.cc   (working copy)
@@ -3413,13 +3413,25 @@
   // Save callee-saved registers (incl. cp and fp), sp, and lr
   __ stm(db_w, sp, kCalleeSaved | lr.bit());

+  if (CpuFeatures::IsSupported(VFP3)) {
+    CpuFeatures::Scope scope(VFP3);
+    // Save callee-saved vfp registers.
+ __ vstm(db_w, sp, kFirstCalleeSavedDoubleReg, kLastCalleeSavedDoubleReg);
+  }
+
   // Get address of argv, see stm above.
   // r0: code entry
   // r1: function
   // r2: receiver
   // r3: argc
- __ ldr(r4, MemOperand(sp, (kNumCalleeSaved + 1) * kPointerSize)); // argv

+  // Setup argv in r4.
+  int offset_to_argv = (kNumCalleeSaved + 1) * kPointerSize;
+  if (CpuFeatures::IsSupported(VFP3)) {
+    offset_to_argv += kNumDoubleCalleeSaved * kDoubleSize;
+  }
+  __ ldr(r4, MemOperand(sp, offset_to_argv));
+
   // Push a frame with special values setup to mark it as an entry frame.
   // r0: code entry
   // r1: function
@@ -3543,6 +3555,13 @@
     __ mov(lr, Operand(pc));
   }
 #endif
+
+  if (CpuFeatures::IsSupported(VFP3)) {
+    CpuFeatures::Scope scope(VFP3);
+    // Restore callee-saved vfp registers.
+ __ vldm(ia_w, sp, kFirstCalleeSavedDoubleReg, kLastCalleeSavedDoubleReg);
+  }
+
   __ ldm(ia_w, sp, kCalleeSaved | pc.bit());
 }

Index: src/arm/frames-arm.h
===================================================================
--- src/arm/frames-arm.h        (revision 8405)
+++ src/arm/frames-arm.h        (working copy)
@@ -72,7 +72,10 @@

 static const int kNumCalleeSaved = 7 + kR9Available;

+// Double registers d8 to d15 are callee-saved.
+static const int kNumDoubleCalleeSaved = 8;

+
 // Number of registers for which space is reserved in safepoints. Must be a
 // multiple of 8.
 // TODO(regis): Only 8 registers may actually be sufficient. Revisit.
Index: src/version.cc
===================================================================
--- src/version.cc      (revision 8405)
+++ src/version.cc      (working copy)
@@ -35,7 +35,7 @@
 #define MAJOR_VERSION     3
 #define MINOR_VERSION     2
 #define BUILD_NUMBER      10
-#define PATCH_LEVEL       22
+#define PATCH_LEVEL       23
 // Use 1 for candidates and 0 otherwise.
 // (Boolean macro values are not supported by all preprocessors.)
 #define IS_CANDIDATE_VERSION 0


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