Reviewers: Jakob Kummerow,
Message:
PTAL.
Description:
Shorter opcodes in ia32 in some cases where register is wrapped in an
operand.
Please review this at http://codereview.chromium.org/8081016/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/ia32/assembler-ia32.cc
Index: src/ia32/assembler-ia32.cc
diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc
index
b4eb0658a626939113e555c44e5e7fdf023e3655..b9e8ed9b067202e35cbcbf810d705a85bdaf643b
100644
--- a/src/ia32/assembler-ia32.cc
+++ b/src/ia32/assembler-ia32.cc
@@ -457,6 +457,10 @@ void Assembler::push(Register src) {
void Assembler::push(const Operand& src) {
+ if (src.is_reg_only()) {
+ push(src.reg());
+ return;
+ }
EnsureSpace ensure_space(this);
EMIT(0xFF);
emit_operand(esi, src);
@@ -478,6 +482,10 @@ void Assembler::pop(Register dst) {
void Assembler::pop(const Operand& dst) {
+ if (dst.is_reg_only()) {
+ pop(dst.reg());
+ return;
+ }
EnsureSpace ensure_space(this);
EMIT(0x8F);
emit_operand(eax, dst);
@@ -560,6 +568,10 @@ void Assembler::mov(Register dst, Handle<Object>
handle) {
void Assembler::mov(Register dst, const Operand& src) {
+ if (src.is_reg_only()) {
+ mov(dst, src.reg());
+ return;
+ }
EnsureSpace ensure_space(this);
EMIT(0x8B);
emit_operand(dst, src);
@@ -865,6 +877,10 @@ void Assembler::dec(Register dst) {
void Assembler::dec(const Operand& dst) {
+ if (dst.is_reg_only()) {
+ dec(dst.reg());
+ return;
+ }
EnsureSpace ensure_space(this);
EMIT(0xFF);
emit_operand(ecx, dst);
@@ -920,6 +936,10 @@ void Assembler::inc(Register dst) {
void Assembler::inc(const Operand& dst) {
+ if (dst.is_reg_only()) {
+ inc(dst.reg());
+ return;
+ }
EnsureSpace ensure_space(this);
EMIT(0xFF);
emit_operand(eax, dst);
--
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