Revision: 9781
Author:   [email protected]
Date:     Wed Oct 26 01:17:24 2011
Log:      Land two MIPS changes.

 Issue 8368021: MIPS: port Fix compilation on ARM and x64 broken by r9738
 Issue 8378001: MIPS: port Avoid static initializers in assember-arm.h.
Review URL: http://codereview.chromium.org/8341048
http://code.google.com/p/v8/source/detail?r=9781

Modified:
 /branches/bleeding_edge/src/mips/assembler-mips-inl.h
 /branches/bleeding_edge/src/mips/assembler-mips.h

=======================================
--- /branches/bleeding_edge/src/mips/assembler-mips-inl.h Thu Oct 13 01:00:10 2011 +++ /branches/bleeding_edge/src/mips/assembler-mips-inl.h Wed Oct 26 01:17:24 2011
@@ -116,10 +116,10 @@
 }


-void RelocInfo::set_target_address(Address target) {
+void RelocInfo::set_target_address(Address target, WriteBarrierMode mode) {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
   Assembler::set_target_address_at(pc_, target);
-  if (host() != NULL && IsCodeTarget(rmode_)) {
+ if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) {
     Object* target_code = Code::GetCodeFromTargetAddress(target);
     host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
         host(), this, HeapObject::cast(target_code));
@@ -150,10 +150,12 @@
 }


-void RelocInfo::set_target_object(Object* target) {
+void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) {
   ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
   Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
-  if (host() != NULL && target->IsHeapObject()) {
+  if (mode == UPDATE_WRITE_BARRIER &&
+      host() != NULL &&
+      target->IsHeapObject()) {
     host()->GetHeap()->incremental_marking()->RecordWrite(
         host(), &Memory::Object_at(pc_), HeapObject::cast(target));
   }
@@ -184,11 +186,12 @@
 }


-void RelocInfo::set_target_cell(JSGlobalPropertyCell* cell) {
+void RelocInfo::set_target_cell(JSGlobalPropertyCell* cell,
+                                WriteBarrierMode mode) {
   ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL);
   Address address = cell->address() + JSGlobalPropertyCell::kValueOffset;
   Memory::Address_at(pc_) = address;
-  if (host() != NULL) {
+  if (mode == UPDATE_WRITE_BARRIER && host() != NULL) {
// TODO(1550) We are passing NULL as a slot because cell can never be on
     // evacuation candidate.
     host()->GetHeap()->incremental_marking()->RecordWrite(
=======================================
--- /branches/bleeding_edge/src/mips/assembler-mips.h Tue Sep 13 05:12:25 2011 +++ /branches/bleeding_edge/src/mips/assembler-mips.h Wed Oct 26 01:17:24 2011
@@ -302,7 +302,7 @@
 const FPURegister f30 = { 30 };
 const FPURegister f31 = { 31 };

-const FPURegister kDoubleRegZero = f28;
+static const FPURegister& kDoubleRegZero = f28;

 // FPU (coprocessor 1) control registers.
 // Currently only FCSR (#31) is implemented.

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