Revision: 9859
Author: [email protected]
Date: Tue Nov 1 09:13:05 2011
Log: MIPS: Merge IR classes for different bitwise operations AND, OR
and XOR into one class.
Port r9846 (4cd055a).
Original commit message:
Since we already have only one LIR class, it does not make much sense to
separate them at the HIR level.
BUG=
TEST=
Review URL: http://codereview.chromium.org/8432010
http://code.google.com/p/v8/source/detail?r=9859
Modified:
/branches/bleeding_edge/src/mips/lithium-mips.cc
/branches/bleeding_edge/src/mips/lithium-mips.h
=======================================
--- /branches/bleeding_edge/src/mips/lithium-mips.cc Fri Oct 28 01:14:46
2011
+++ /branches/bleeding_edge/src/mips/lithium-mips.cc Tue Nov 1 09:13:05
2011
@@ -818,28 +818,6 @@
LInstruction* LChunkBuilder::DoDeoptimize(HDeoptimize* instr) {
return AssignEnvironment(new LDeoptimize);
}
-
-
-LInstruction* LChunkBuilder::DoBit(Token::Value op,
- HBitwiseBinaryOperation* instr) {
- if (instr->representation().IsInteger32()) {
- ASSERT(instr->left()->representation().IsInteger32());
- ASSERT(instr->right()->representation().IsInteger32());
-
- LOperand* left = UseRegisterAtStart(instr->LeastConstantOperand());
- LOperand* right = UseOrConstantAtStart(instr->MostConstantOperand());
- return DefineAsRegister(new LBitI(op, left, right));
- } else {
- ASSERT(instr->representation().IsTagged());
- ASSERT(instr->left()->representation().IsTagged());
- ASSERT(instr->right()->representation().IsTagged());
-
- LOperand* left = UseFixed(instr->left(), a1);
- LOperand* right = UseFixed(instr->right(), a0);
- LArithmeticT* result = new LArithmeticT(op, left, right);
- return MarkAsCall(DefineFixed(result, v0), instr);
- }
-}
LInstruction* LChunkBuilder::DoShift(Token::Value op,
@@ -1242,8 +1220,24 @@
}
-LInstruction* LChunkBuilder::DoBitAnd(HBitAnd* instr) {
- return DoBit(Token::BIT_AND, instr);
+LInstruction* LChunkBuilder::DoBitwise(HBitwise* instr) {
+ if (instr->representation().IsInteger32()) {
+ ASSERT(instr->left()->representation().IsInteger32());
+ ASSERT(instr->right()->representation().IsInteger32());
+
+ LOperand* left = UseRegisterAtStart(instr->LeastConstantOperand());
+ LOperand* right = UseOrConstantAtStart(instr->MostConstantOperand());
+ return DefineAsRegister(new LBitI(left, right));
+ } else {
+ ASSERT(instr->representation().IsTagged());
+ ASSERT(instr->left()->representation().IsTagged());
+ ASSERT(instr->right()->representation().IsTagged());
+
+ LOperand* left = UseFixed(instr->left(), a1);
+ LOperand* right = UseFixed(instr->right(), a0);
+ LArithmeticT* result = new LArithmeticT(instr->op(), left, right);
+ return MarkAsCall(DefineFixed(result, v0), instr);
+ }
}
@@ -1252,16 +1246,6 @@
ASSERT(instr->representation().IsInteger32());
return DefineAsRegister(new
LBitNotI(UseRegisterAtStart(instr->value())));
}
-
-
-LInstruction* LChunkBuilder::DoBitOr(HBitOr* instr) {
- return DoBit(Token::BIT_OR, instr);
-}
-
-
-LInstruction* LChunkBuilder::DoBitXor(HBitXor* instr) {
- return DoBit(Token::BIT_XOR, instr);
-}
LInstruction* LChunkBuilder::DoDiv(HDiv* instr) {
=======================================
--- /branches/bleeding_edge/src/mips/lithium-mips.h Fri Oct 28 01:14:46 2011
+++ /branches/bleeding_edge/src/mips/lithium-mips.h Tue Nov 1 09:13:05 2011
@@ -796,18 +796,15 @@
class LBitI: public LTemplateInstruction<1, 2, 0> {
public:
- LBitI(Token::Value op, LOperand* left, LOperand* right)
- : op_(op) {
+ LBitI(LOperand* left, LOperand* right) {
inputs_[0] = left;
inputs_[1] = right;
}
- Token::Value op() const { return op_; }
+ Token::Value op() const { return hydrogen()->op(); }
DECLARE_CONCRETE_INSTRUCTION(BitI, "bit-i")
-
- private:
- Token::Value op_;
+ DECLARE_HYDROGEN_ACCESSOR(Bitwise)
};
--
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