Reviewers: Jakob,
Message:
PTAL.
I also reordered the loads in ia32 in the hope that a clever processor would
continue with execution while waiting for the memory latency since there is
no
data dependency.
Description:
Port r10939 to x64 and arm (inline Math.random in crankshaft).
BUG=
TEST=
Please review this at http://codereview.chromium.org/9615012/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/arm/lithium-codegen-arm.h
M src/arm/lithium-codegen-arm.cc
M src/ia32/lithium-codegen-ia32.cc
M src/x64/lithium-codegen-x64.h
M src/x64/lithium-codegen-x64.cc
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
