Reviewers: ,
Message:
Uploading this since it's used for Raspberry Pi builds of Chromium to use
VFP2
capability on the board (where VFP3 isn't supported).
Description:
Split VFP support in VFP2/3
BUG=none
TEST=Build with v8_can_use_vfp2_instructions=true on hardware with VFP2 but
without VFP3, verify no crash
Please review this at https://chromiumcodereview.appspot.com/10796069/
SVN Base: http://v8.googlecode.com/svn/branches/bleeding_edge/
Affected files:
M build/common.gypi
M src/arm/assembler-arm.cc
M src/arm/code-stubs-arm.cc
M src/arm/macro-assembler-arm.cc
M src/v8globals.h
Index: build/common.gypi
===================================================================
--- build/common.gypi (revision 12165)
+++ build/common.gypi (working copy)
@@ -48,7 +48,8 @@
# both for the snapshot and for the ARM target. Leaving the default
value
# of 'false' will avoid VFP instructions in the snapshot and use CPU
feature
# probing when running on the target.
- 'v8_can_use_vfp_instructions%': 'false',
+ 'v8_can_use_vfp2_instructions%': 'false',
+ 'v8_can_use_vfp3_instructions%': 'false',
# Similar to vfp but on MIPS.
'v8_can_use_fpu_instructions%': 'true',
@@ -132,11 +133,16 @@
'CAN_USE_UNALIGNED_ACCESSES=0',
],
}],
- [ 'v8_can_use_vfp_instructions=="true"', {
+ [ 'v8_can_use_vfp2_instructions=="true"', {
'defines': [
- 'CAN_USE_VFP_INSTRUCTIONS',
+ 'CAN_USE_VFP2_INSTRUCTIONS',
],
}],
+ [ 'v8_can_use_vfp3_instructions=="true"', {
+ 'defines': [
+ 'CAN_USE_VFP3_INSTRUCTIONS',
+ ],
+ }],
[ 'v8_use_arm_eabi_hardfloat=="true"', {
'defines': [
'USE_EABI_HARDFLOAT=1',
Index: src/arm/assembler-arm.cc
===================================================================
--- src/arm/assembler-arm.cc (revision 12165)
+++ src/arm/assembler-arm.cc (working copy)
@@ -52,7 +52,7 @@
// Get the CPU features enabled by the build. For cross compilation the
-// preprocessor symbols CAN_USE_ARMV7_INSTRUCTIONS and
CAN_USE_VFP_INSTRUCTIONS
+// preprocessor symbols CAN_USE_ARMV7_INSTRUCTIONS and
CAN_USE_VFP3_INSTRUCTIONS
// can be defined to enable ARMv7 and VFPv3 instructions when building the
// snapshot.
static uint64_t CpuFeaturesImpliedByCompiler() {
@@ -60,9 +60,12 @@
#ifdef CAN_USE_ARMV7_INSTRUCTIONS
answer |= 1u << ARMv7;
#endif // def CAN_USE_ARMV7_INSTRUCTIONS
-#ifdef CAN_USE_VFP_INSTRUCTIONS
- answer |= 1u << VFP3 | 1u << ARMv7;
-#endif // def CAN_USE_VFP_INSTRUCTIONS
+#ifdef CAN_USE_VFP3_INSTRUCTIONS
+ answer |= 1u << VFP3 | 1u << VFP2 | 1u << ARMv7;
+#endif // def CAN_USE_VFP3_INSTRUCTIONS
+#ifdef CAN_USE_VFP2_INSTRUCTIONS
+ answer |= 1u << VFP2;
+#endif // def CAN_USE_VFP2_INSTRUCTIONS
#ifdef __arm__
// If the compiler is allowed to use VFP then we can use VFP too in our
code
@@ -1742,7 +1745,7 @@
// Instruction details available in ARM DDI 0406A, A8-786.
// cond(31-28) | 1101(27-24)| U000(23-20) | | Rbase(19-16) |
// Vsrc(15-12) | 1011(11-8) | (offset/4)
- ASSERT(CpuFeatures::IsEnabled(VFP3));
+ ASSERT(CpuFeatures::IsEnabled(VFP3) || CpuFeatures::IsEnabled(VFP2));
int u = 1;
if (offset < 0) {
offset = -offset;
@@ -2028,7 +2031,7 @@
// Instruction details available in ARM DDI 0406A, A8-646.
// cond(31-28) | 1100(27-24)| 010(23-21) | op=0(20) | Rt2(19-16) |
// Rt(15-12) | 1011(11-8) | 00(7-6) | M(5) | 1(4) | Vm
- ASSERT(CpuFeatures::IsEnabled(VFP3));
+ ASSERT(CpuFeatures::IsEnabled(VFP3) || CpuFeatures::IsEnabled(VFP2));
ASSERT(!src1.is(pc) && !src2.is(pc));
emit(cond | 0xC*B24 | B22 | src2.code()*B16 |
src1.code()*B12 | 0xB*B8 | B4 | dst.code());
Index: src/arm/code-stubs-arm.cc
===================================================================
--- src/arm/code-stubs-arm.cc (revision 12165)
+++ src/arm/code-stubs-arm.cc (working copy)
@@ -1058,7 +1058,7 @@
__ push(lr);
__ PrepareCallCFunction(0, 2, scratch);
if (masm->use_eabi_hardfloat()) {
- CpuFeatures::Scope scope(VFP3);
+ CpuFeatures::Scope scope(VFP2);
__ vmov(d0, r0, r1);
__ vmov(d1, r2, r3);
}
@@ -1070,7 +1070,7 @@
// Store answer in the overwritable heap number. Double returned in
// registers r0 and r1 or in d0.
if (masm->use_eabi_hardfloat()) {
- CpuFeatures::Scope scope(VFP3);
+ CpuFeatures::Scope scope(VFP2);
__ vstr(d0,
FieldMemOperand(heap_number_result, HeapNumber::kValueOffset));
} else {
@@ -1442,7 +1442,7 @@
__ push(lr);
__ PrepareCallCFunction(0, 2, r5);
if (masm->use_eabi_hardfloat()) {
- CpuFeatures::Scope scope(VFP3);
+ CpuFeatures::Scope scope(VFP2);
__ vmov(d0, r0, r1);
__ vmov(d1, r2, r3);
}
@@ -3469,7 +3469,7 @@
__ push(lr);
__ PrepareCallCFunction(0, 1, scratch);
- if (masm->use_eabi_hardfloat()) {
+ if (masm->use_eabi_hardfloat() && CpuFeatures::IsSupported(VFP3)) {
__ vmov(d0, d2);
} else {
__ vmov(r0, r1, d2);
Index: src/arm/macro-assembler-arm.cc
===================================================================
--- src/arm/macro-assembler-arm.cc (revision 12165)
+++ src/arm/macro-assembler-arm.cc (working copy)
@@ -930,7 +930,7 @@
}
void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) {
- if (use_eabi_hardfloat()) {
+ if (use_eabi_hardfloat() && CpuFeatures::IsSupported(VFP3)) {
Move(dst, d0);
} else {
vmov(dst, r0, r1);
@@ -3332,7 +3332,7 @@
void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) {
- if (use_eabi_hardfloat()) {
+ if (use_eabi_hardfloat() && CpuFeatures::IsSupported(VFP3)) {
Move(d0, dreg);
} else {
vmov(r0, r1, dreg);
@@ -3342,7 +3342,7 @@
void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1,
DoubleRegister dreg2) {
- if (use_eabi_hardfloat()) {
+ if (use_eabi_hardfloat() && CpuFeatures::IsSupported(VFP3)) {
if (dreg2.is(d0)) {
ASSERT(!dreg1.is(d1));
Move(d1, dreg2);
@@ -3360,7 +3360,7 @@
void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg,
Register reg) {
- if (use_eabi_hardfloat()) {
+ if (use_eabi_hardfloat() && CpuFeatures::IsSupported(VFP3)) {
Move(d0, dreg);
Move(r0, reg);
} else {
Index: src/v8globals.h
===================================================================
--- src/v8globals.h (revision 12165)
+++ src/v8globals.h (working copy)
@@ -436,6 +436,7 @@
CPUID = 10, // x86
VFP3 = 1, // ARM
ARMv7 = 2, // ARM
+ VFP2 = 4, // ARM
SAHF = 0, // x86
FPU = 1}; // MIPS
--
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