Revision: 12556
Author:   [email protected]
Date:     Wed Sep 19 08:12:52 2012
Log:      Merged r12086, r12478 into 3.8 branch.

Fix transcendental cache on ARM in optimized code.

Fix delta computation in DoDeferredInstanceOfKnownGlobal() for ARM.

BUG=v8:2234,v8:2314

[email protected]

Review URL: https://chromiumcodereview.appspot.com/10937029
http://code.google.com/p/v8/source/detail?r=12556

Added:
 /branches/3.8/test/mjsunit/regress/regress-2234.js
Modified:
 /branches/3.8/src/arm/code-stubs-arm.cc
 /branches/3.8/src/arm/lithium-codegen-arm.cc
 /branches/3.8/src/version.cc

=======================================
--- /dev/null
+++ /branches/3.8/test/mjsunit/regress/regress-2234.js Wed Sep 19 08:12:52 2012
@@ -0,0 +1,41 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+//       notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+//       copyright notice, this list of conditions and the following
+//       disclaimer in the documentation and/or other materials provided
+//       with the distribution.
+//     * Neither the name of Google Inc. nor the names of its
+//       contributors may be used to endorse or promote products derived
+//       from this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// Flags: --allow-natives-syntax
+
+function test(i) {
+  // Overwrite random parts of the transcendental cache.
+  Math.sin(i / 1779 * Math.PI);
+  // Check whether the first cache line has been accidentally overwritten
+  // with incorrect key.
+  assertEquals(0, Math.sin(0));
+}
+
+for (i = 0; i < 10000; ++i) {
+  test(i);
+  if (i == 0) %OptimizeFunctionOnNextCall(test);
+}
=======================================
--- /branches/3.8/src/arm/code-stubs-arm.cc     Thu Jan 19 07:36:35 2012
+++ /branches/3.8/src/arm/code-stubs-arm.cc     Wed Sep 19 08:12:52 2012
@@ -3338,23 +3338,23 @@
         ExternalReference(RuntimeFunction(), masm->isolate());
     __ TailCallExternalReference(runtime_function, 1, 1);
   } else {
-    if (!CpuFeatures::IsSupported(VFP3)) UNREACHABLE();
+    ASSERT(CpuFeatures::IsSupported(VFP3));
     CpuFeatures::Scope scope(VFP3);

     Label no_update;
     Label skip_cache;

     // Call C function to calculate the result and update the cache.
-    // Register r0 holds precalculated cache entry address; preserve
-    // it on the stack and pop it into register cache_entry after the
-    // call.
-    __ push(cache_entry);
+    // r0: precalculated cache entry address.
+    // r2 and r3: parts of the double value.
+    // Store r0, r2 and r3 on stack for later before calling C function.
+    __ Push(r3, r2, cache_entry);
     GenerateCallCFunction(masm, scratch0);
     __ GetCFunctionDoubleResult(d2);

     // Try to update the cache. If we cannot allocate a
     // heap number, we return the result without updating.
-    __ pop(cache_entry);
+    __ Pop(r3, r2, cache_entry);
     __ LoadRoot(r5, Heap::kHeapNumberMapRootIndex);
     __ AllocateHeapNumber(r6, scratch0, scratch1, r5, &no_update);
     __ vstr(d2, FieldMemOperand(r6, HeapNumber::kValueOffset));
=======================================
--- /branches/3.8/src/arm/lithium-codegen-arm.cc        Wed Jan 25 23:37:54 2012
+++ /branches/3.8/src/arm/lithium-codegen-arm.cc        Wed Sep 19 08:12:52 2012
@@ -2210,12 +2210,18 @@
   Register temp = ToRegister(instr->TempAt(0));
   ASSERT(temp.is(r4));
   __ LoadHeapObject(InstanceofStub::right(), instr->function());
-  static const int kAdditionalDelta = 4;
+  static const int kAdditionalDelta = 5;
int delta = masm_->InstructionsGeneratedSince(map_check) + kAdditionalDelta;
   Label before_push_delta;
   __ bind(&before_push_delta);
   __ BlockConstPoolFor(kAdditionalDelta);
   __ mov(temp, Operand(delta * kPointerSize));
+ // The mov above can generate one or two instructions. The delta was computed + // for two instructions, so we need to pad here in case of one instruction.
+  if (masm_->InstructionsGeneratedSince(&before_push_delta) != 2) {
+    ASSERT_EQ(1, masm_->InstructionsGeneratedSince(&before_push_delta));
+    __ nop();
+  }
   __ StoreToSafepointRegisterSlot(temp, temp);
   CallCodeGeneric(stub.GetCode(),
                   RelocInfo::CODE_TARGET,
=======================================
--- /branches/3.8/src/version.cc        Thu Sep  6 01:20:59 2012
+++ /branches/3.8/src/version.cc        Wed Sep 19 08:12:52 2012
@@ -35,7 +35,7 @@
 #define MAJOR_VERSION     3
 #define MINOR_VERSION     8
 #define BUILD_NUMBER      9
-#define PATCH_LEVEL       28
+#define PATCH_LEVEL       29
 // Use 1 for candidates and 0 otherwise.
 // (Boolean macro values are not supported by all preprocessors.)
 #define IS_CANDIDATE_VERSION 0

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