Reviewers: danno, Paul Lind, kisg,
Description:
MIPS: Changed "marked" nops to use sll(zero_reg, at, type).
We use marking bits in nops (in the 'sa' field) for debug markers, and for
some
IC stuff. A normal NOP in mips is sll(zero_reg, zero_reg, 0), where the 0
is a 5
bit immediate field in 'sa'.
See enum NopMarkerTypes at around line 654 of assembler-mips.h
The problem is that these markers use encodings that are reserved for the
'ssnop' and 'ehb' instructions. These are instructions used for hazard
barriers.
It does not break anything, but it will slow things down a little bit as
some
pipeline stages are cleared, etc.
This commit changes the "marked" NOPs to sll(zero_reg, at, type)
instructions,
which is also a NOP operation on MIPS.
BUG=
TEST=
Please review this at https://chromiumcodereview.appspot.com/10990110/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/mips/assembler-mips.h
M src/mips/assembler-mips.cc
Index: src/mips/assembler-mips.cc
diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc
index
801ca2c152c81a85a221f51c80a12e846e980605..a4563a64f3a602e2889e1864f651a482b34c6e9e
100644
--- a/src/mips/assembler-mips.cc
+++ b/src/mips/assembler-mips.cc
@@ -580,17 +580,20 @@ bool Assembler::IsNop(Instr instr, unsigned int type)
{
// See Assembler::nop(type).
ASSERT(type < 32);
uint32_t opcode = GetOpcodeField(instr);
+ uint32_t function = GetFunctionField(instr);
uint32_t rt = GetRt(instr);
- uint32_t rs = GetRs(instr);
+ uint32_t rd = GetRd(instr);
uint32_t sa = GetSa(instr);
- // nop(type) == sll(zero_reg, zero_reg, type);
- // Technically all these values will be 0 but
- // this makes more sense to the reader.
+ // Traditional mips nop == sll(zero_reg, zero_reg, 0)
+ // When marking non-zero type, use sll(zero_reg, at, type)
+ // to avoid use of mips ssnop and ehb special encodings
+ // of the sll instruction.
- bool ret = (opcode == SLL &&
- rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
- rs == static_cast<uint32_t>(ToNumber(zero_reg)) &&
+ Register nop_rt_reg = (type == 0) ? zero_reg : at;
+ bool ret = (opcode == SPECIAL && function == SLL &&
+ rd == static_cast<uint32_t>(ToNumber(zero_reg)) &&
+ rt == static_cast<uint32_t>(ToNumber(nop_rt_reg)) &&
sa == type);
return ret;
Index: src/mips/assembler-mips.h
diff --git a/src/mips/assembler-mips.h b/src/mips/assembler-mips.h
index
71637701785e84f4dddaa95524855f84c4cbfb24..ee4daadf1243c584329aa60376636b034b2521a7
100644
--- a/src/mips/assembler-mips.h
+++ b/src/mips/assembler-mips.h
@@ -663,10 +663,13 @@ class Assembler : public AssemblerBase {
FIRST_IC_MARKER = PROPERTY_ACCESS_INLINED
};
- // Type == 0 is the default non-marking type.
+ // Type == 0 is the default non-marking nop. For mips this is a
+ // sll(zero_reg, zero_reg, 0). We use rt_reg == at for non-zero
+ // marking, to avoid conflict with ssnop and ehb instructions.
void nop(unsigned int type = 0) {
ASSERT(type < 32);
- sll(zero_reg, zero_reg, type, true);
+ Register nop_rt_reg = (type == 0) ? zero_reg : at;
+ sll(zero_reg, nop_rt_reg, type, true);
}
--
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