Reviewers: danno, Paul Lind, kisg, kilvadyb_homejinni.com,
Description:
MIPS: Fixed faulty branch condition handling for doubles.
This commit also includes BranchF refactoring in macro-assembler.
TEST=mozilla/ecma/TypeConversion/9.2.js
BUG=
Please review this at https://codereview.chromium.org/12505004/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/mips/constants-mips.h
M src/mips/lithium-codegen-mips.cc
M src/mips/macro-assembler-mips.cc
Index: src/mips/constants-mips.h
diff --git a/src/mips/constants-mips.h b/src/mips/constants-mips.h
index
e7c55f5806210aec0981f0012a212f182b947b42..139e7db033c555adf6426674ac477bc21f190c25
100644
--- a/src/mips/constants-mips.h
+++ b/src/mips/constants-mips.h
@@ -429,7 +429,9 @@ enum SecondaryField {
// ----- Emulated conditions.
// On MIPS we use this enum to abstract from conditionnal branch
instructions.
-// the 'U' prefix is used to specify unsigned comparisons.
+// The 'U' prefix is used to specify unsigned comparisons.
+// Oppposite conditions must be paired as odd/even numbers
+// because 'NegateCondition' function flips LSB to negate condition.
enum Condition {
// Any value < 0 is considered no_condition.
kNoCondition = -1,
@@ -450,8 +452,10 @@ enum Condition {
greater_equal = 13,
less_equal = 14,
greater = 15,
+ ueq = 16, // Unordered or Equal.
+ nue = 17, // Not (Unordered or Equal).
- cc_always = 16,
+ cc_always = 18,
// Aliases.
carry = Uless,
Index: src/mips/lithium-codegen-mips.cc
diff --git a/src/mips/lithium-codegen-mips.cc
b/src/mips/lithium-codegen-mips.cc
index
194652562216c6bee905e3adce078794cfd591c8..c36fb9d401163b9c059efd5225bebd30fddb8db8
100644
--- a/src/mips/lithium-codegen-mips.cc
+++ b/src/mips/lithium-codegen-mips.cc
@@ -1826,7 +1826,7 @@ void LCodeGen::DoBranch(LBranch* instr) {
CpuFeatureScope scope(masm(), FPU);
DoubleRegister reg = ToDoubleRegister(instr->value());
// Test the double value. Zero and NaN are false.
- EmitBranchF(true_block, false_block, ne, reg, kDoubleRegZero);
+ EmitBranchF(true_block, false_block, nue, reg, kDoubleRegZero);
} else {
ASSERT(r.IsTagged());
Register reg = ToRegister(instr->value());
Index: src/mips/macro-assembler-mips.cc
diff --git a/src/mips/macro-assembler-mips.cc
b/src/mips/macro-assembler-mips.cc
index
62d42fda88ad77450b68117f7aa987d25bb1b862..8f63b4f9f3b45cd441c97b9928410aab9361e048
100644
--- a/src/mips/macro-assembler-mips.cc
+++ b/src/mips/macro-assembler-mips.cc
@@ -1125,23 +1125,19 @@ void MacroAssembler::BranchF(Label* target,
// have been handled by the caller.
// Unsigned conditions are treated as their signed counterpart.
switch (cc) {
- case Uless:
- case less:
+ case lt:
c(OLT, D, cmp1, cmp2);
bc1t(target);
break;
- case Ugreater:
- case greater:
+ case gt:
c(ULE, D, cmp1, cmp2);
bc1f(target);
break;
- case Ugreater_equal:
- case greater_equal:
+ case ge:
c(ULT, D, cmp1, cmp2);
bc1f(target);
break;
- case Uless_equal:
- case less_equal:
+ case le:
c(OLE, D, cmp1, cmp2);
bc1t(target);
break;
@@ -1149,10 +1145,18 @@ void MacroAssembler::BranchF(Label* target,
c(EQ, D, cmp1, cmp2);
bc1t(target);
break;
+ case ueq:
+ c(UEQ, D, cmp1, cmp2);
+ bc1t(target);
+ break;
case ne:
c(EQ, D, cmp1, cmp2);
bc1f(target);
break;
+ case nue:
+ c(UEQ, D, cmp1, cmp2);
+ bc1f(target);
+ break;
default:
CHECK(0);
};
--
--
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