Reviewers: danno,
Message:
On x64, we have a guarantee that SSE2 instructions are always available.
Like we
do for other such guarantees, we can eliminate checks/asserts/scopes for
this
feature.
Description:
Remove SSE2 feature checks from x64 code (it is always on)
BUG=
Please review this at https://codereview.chromium.org/13928006/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/x64/assembler-x64.h
M src/x64/assembler-x64.cc
M src/x64/macro-assembler-x64.cc
Index: src/x64/assembler-x64.cc
diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index
57d40f7946879014d61b254255df0e18d572f3c2..eee1584cf1fa5c34e870568f8b58b8672a47b0a1
100644
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -150,9 +150,8 @@ void CpuFeatures::Probe() {
found_by_runtime_probing_only_
= probed_features & ~kDefaultCpuFeatures & ~platform_features;
- // SSE2 and CMOV must be available on an X64 CPU.
+ // CMOV must be available on an X64 CPU.
ASSERT(IsSupported(CPUID));
- ASSERT(IsSupported(SSE2));
ASSERT(IsSupported(CMOV));
delete memory;
Index: src/x64/assembler-x64.h
diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h
index
49a57e6929096c233d4aa7e28ad9d294a4bae5b0..13f269f5dfccdd335a4c6b71ab1544ce622f8232
100644
--- a/src/x64/assembler-x64.h
+++ b/src/x64/assembler-x64.h
@@ -448,7 +448,7 @@ class Operand BASE_EMBEDDED {
// CpuFeatureScope fscope(assembler, SSE3);
// // Generate SSE3 floating point code.
// } else {
-// // Generate standard x87 or SSE2 floating point code.
+// // Generate standard SSE2 floating point code.
// }
class CpuFeatures : public AllStatic {
public:
@@ -459,7 +459,6 @@ class CpuFeatures : public AllStatic {
// Check whether a feature is supported by the target CPU.
static bool IsSupported(CpuFeature f) {
ASSERT(initialized_);
- if (f == SSE2 && !FLAG_enable_sse2) return false;
if (f == SSE3 && !FLAG_enable_sse3) return false;
if (f == SSE4_1 && !FLAG_enable_sse4_1) return false;
if (f == CMOV && !FLAG_enable_cmov) return false;
@@ -480,11 +479,11 @@ class CpuFeatures : public AllStatic {
}
private:
- // Safe defaults include SSE2 and CMOV for X64. It is always available,
if
+ // Safe defaults include CMOV for X64. It is always available, if
// anyone checks, but they shouldn't need to check.
// The required user mode extensions in X64 are (from AMD64 ABI Table
A.1):
// fpu, tsc, cx8, cmov, mmx, sse, sse2, fxsr, syscall
- static const uint64_t kDefaultCpuFeatures = (1 << SSE2 | 1 << CMOV);
+ static const uint64_t kDefaultCpuFeatures = (1 << CMOV);
#ifdef DEBUG
static bool initialized_;
Index: src/x64/macro-assembler-x64.cc
diff --git a/src/x64/macro-assembler-x64.cc b/src/x64/macro-assembler-x64.cc
index
6c1c19df3e86996ea65d508156660692cd28c381..58659241a66e1afd72f2a322347276dce878e546
100644
--- a/src/x64/macro-assembler-x64.cc
+++ b/src/x64/macro-assembler-x64.cc
@@ -899,7 +899,6 @@ void MacroAssembler::PushCallerSaved(SaveFPRegsMode
fp_mode,
}
// R12 to r15 are callee save on all platforms.
if (fp_mode == kSaveFPRegs) {
- CpuFeatureScope scope(this, SSE2);
subq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters));
for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
XMMRegister reg = XMMRegister::from_code(i);
@@ -914,7 +913,6 @@ void MacroAssembler::PopCallerSaved(SaveFPRegsMode
fp_mode,
Register exclusion2,
Register exclusion3) {
if (fp_mode == kSaveFPRegs) {
- CpuFeatureScope scope(this, SSE2);
for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
XMMRegister reg = XMMRegister::from_code(i);
movsd(reg, Operand(rsp, i * kDoubleSize));
--
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
---
You received this message because you are subscribed to the Google Groups "v8-dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/groups/opt_out.
