Reviewers: ulan, Michael Starzinger, Paul Lind,
Message:
Hi guys,
Here is the
1) revert of the erroneous arm fp reg change from yesterday (thx for
catching,
Paul)
2) now check at runtime in record write stubs how many ARM registers we
have,
using snazzy vldm/vstm instructions.
3) Touch another place that saves fp registers, using vldm/vstm.
4) Code appearing soon in the snapshot needs StoreBufferOverflowStub with
kSaveFPRegs mode.
Description:
RecordWriteStubs on ARM need to save FP registers
A previous change erroneously stopped saving fp registers for write stubs in
snapshotted code. This CL restores correct behavior, and makes sure code
that
saves fp registers checks at runtime for 16 or 32 fp registers. Also fix a
bug
in the arm simulator debugger.
BUG=
Please review this at https://codereview.chromium.org/14246032/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/arm/code-stubs-arm.h
M src/arm/code-stubs-arm.cc
M src/arm/lithium-codegen-arm.cc
M src/arm/simulator-arm.cc
Index: src/arm/code-stubs-arm.cc
diff --git a/src/arm/code-stubs-arm.cc b/src/arm/code-stubs-arm.cc
index
8ad30895a77b47b8145d32203079682b41ddf952..dbe2bd7f8de5a865b68443ad605c149e8bf924c9
100644
--- a/src/arm/code-stubs-arm.cc
+++ b/src/arm/code-stubs-arm.cc
@@ -1653,12 +1653,9 @@ void
StoreBufferOverflowStub::Generate(MacroAssembler* masm) {
if (save_doubles_ == kSaveFPRegs) {
// Check CPU flags for number of registers, setting the Z condition
flag.
__ CheckFor32DRegs(scratch);
-
- __ sub(sp, sp, Operand(kDoubleSize * DwVfpRegister::kMaxNumRegisters));
- for (int i = 0; i < DwVfpRegister::kMaxNumRegisters; i++) {
- DwVfpRegister reg = DwVfpRegister::from_code(i);
- __ vstr(reg, MemOperand(sp, i * kDoubleSize), i < 16 ? al : ne);
- }
+ __ vstm(db_w, sp, d16, d31, ne);
+ __ sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
+ __ vstm(db_w, sp, d0, d15);
}
const int argument_count = 1;
const int fp_argument_count = 0;
@@ -1672,12 +1669,9 @@ void
StoreBufferOverflowStub::Generate(MacroAssembler* masm) {
if (save_doubles_ == kSaveFPRegs) {
// Check CPU flags for number of registers, setting the Z condition
flag.
__ CheckFor32DRegs(scratch);
-
- for (int i = 0; i < DwVfpRegister::kMaxNumRegisters; i++) {
- DwVfpRegister reg = DwVfpRegister::from_code(i);
- __ vldr(reg, MemOperand(sp, i * kDoubleSize), i < 16 ? al : ne);
- }
- __ add(sp, sp, Operand(kDoubleSize * DwVfpRegister::kMaxNumRegisters));
+ __ vldm(ia_w, sp, d0, d15);
+ __ vldm(ia_w, sp, d16, d31, ne);
+ __ add(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
}
__ ldm(ia_w, sp, kCallerSaved | pc.bit()); // Also pop pc to get Ret(0).
}
@@ -7194,6 +7188,9 @@ void
StoreBufferOverflowStub::GenerateFixedRegStubsAheadOfTime(
Isolate* isolate) {
StoreBufferOverflowStub stub1(kDontSaveFPRegs);
stub1.GetCode(isolate)->set_is_pregenerated(true);
+ // Hydrogen code stubs need stub2 at snapshot time.
+ StoreBufferOverflowStub stub2(kSaveFPRegs);
+ stub2.GetCode(isolate)->set_is_pregenerated(true);
}
Index: src/arm/code-stubs-arm.h
diff --git a/src/arm/code-stubs-arm.h b/src/arm/code-stubs-arm.h
index
75cbf6582c6bd19c8de1b0090a86c7d7fe557539..17344075440756408121d66736025b004219f58b
100644
--- a/src/arm/code-stubs-arm.h
+++ b/src/arm/code-stubs-arm.h
@@ -469,34 +469,20 @@ class RecordWriteStub: public PlatformCodeStub {
void SaveCallerSaveRegisters(MacroAssembler* masm, SaveFPRegsMode
mode) {
masm->stm(db_w, sp, (kCallerSaved | lr.bit()) & ~scratch1_.bit());
if (mode == kSaveFPRegs) {
- // Number of d-regs not known at snapshot time.
- ASSERT(!Serializer::enabled());
- masm->sub(sp,
- sp,
- Operand(kDoubleSize * (DwVfpRegister::NumRegisters() -
1)));
- // Save all VFP registers except d0.
- // TODO(hans): We should probably save d0 too. And maybe use vstm.
- for (int i = DwVfpRegister::NumRegisters() - 1; i > 0; i--) {
- DwVfpRegister reg = DwVfpRegister::from_code(i);
- masm->vstr(reg, MemOperand(sp, (i - 1) * kDoubleSize));
- }
+ masm->CheckFor32DRegs(ip);
+ masm->vstm(db_w, sp, d16, d31, ne);
+ masm->sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
+ masm->vstm(db_w, sp, d0, d15);
}
}
inline void RestoreCallerSaveRegisters(MacroAssembler*masm,
SaveFPRegsMode mode) {
if (mode == kSaveFPRegs) {
- // Number of d-regs not known at snapshot time.
- ASSERT(!Serializer::enabled());
- // Restore all VFP registers except d0.
- // TODO(hans): We should probably restore d0 too. And maybe use
vldm.
- for (int i = DwVfpRegister::NumRegisters() - 1; i > 0; i--) {
- DwVfpRegister reg = DwVfpRegister::from_code(i);
- masm->vldr(reg, MemOperand(sp, (i - 1) * kDoubleSize));
- }
- masm->add(sp,
- sp,
- Operand(kDoubleSize * (DwVfpRegister::NumRegisters() -
1)));
+ masm->CheckFor32DRegs(ip);
+ masm->vldm(ia_w, sp, d0, d15);
+ masm->vldm(ia_w, sp, d16, d31, ne);
+ masm->add(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
}
masm->ldm(ia_w, sp, (kCallerSaved | lr.bit()) & ~scratch1_.bit());
}
Index: src/arm/lithium-codegen-arm.cc
diff --git a/src/arm/lithium-codegen-arm.cc b/src/arm/lithium-codegen-arm.cc
index
c6ba51770331417db3b30847214692805a4708ea..a06d80454956cdebb9f44299a17993212c29002c
100644
--- a/src/arm/lithium-codegen-arm.cc
+++ b/src/arm/lithium-codegen-arm.cc
@@ -36,14 +36,6 @@ namespace v8 {
namespace internal {
-static SaveFPRegsMode GetSaveFPRegsMode() {
- // We don't need to save floating point regs when generating the snapshot
- return CpuFeatures::IsSafeForSnapshot(VFP32DREGS)
- ? kSaveFPRegs
- : kDontSaveFPRegs;
-}
-
-
class SafepointGenerator : public CallWrapper {
public:
SafepointGenerator(LCodeGen* codegen,
@@ -251,7 +243,7 @@ bool LCodeGen::GeneratePrologue() {
r0,
r3,
GetLinkRegisterState(),
- GetSaveFPRegsMode());
+ kSaveFPRegs);
}
}
Comment(";;; End allocate local context");
@@ -3080,7 +3072,7 @@ void LCodeGen::DoStoreContextSlot(LStoreContextSlot*
instr) {
value,
scratch,
GetLinkRegisterState(),
- GetSaveFPRegsMode(),
+ kSaveFPRegs,
EMIT_REMEMBERED_SET,
check_needed);
}
@@ -4269,7 +4261,7 @@ void LCodeGen::DoStoreNamedField(LStoreNamedField*
instr) {
scratch,
temp,
GetLinkRegisterState(),
- GetSaveFPRegsMode(),
+ kSaveFPRegs,
OMIT_REMEMBERED_SET,
OMIT_SMI_CHECK);
}
@@ -4288,7 +4280,7 @@ void LCodeGen::DoStoreNamedField(LStoreNamedField*
instr) {
value,
scratch,
GetLinkRegisterState(),
- GetSaveFPRegsMode(),
+ kSaveFPRegs,
EMIT_REMEMBERED_SET,
check_needed);
}
@@ -4303,7 +4295,7 @@ void LCodeGen::DoStoreNamedField(LStoreNamedField*
instr) {
value,
object,
GetLinkRegisterState(),
- GetSaveFPRegsMode(),
+ kSaveFPRegs,
EMIT_REMEMBERED_SET,
check_needed);
}
@@ -4497,7 +4489,7 @@ void LCodeGen::DoStoreKeyedFixedArray(LStoreKeyed*
instr) {
key,
value,
GetLinkRegisterState(),
- GetSaveFPRegsMode(),
+ kSaveFPRegs,
EMIT_REMEMBERED_SET,
check_needed);
}
Index: src/arm/simulator-arm.cc
diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
index
ea79310447cc9d816e927da7bec9517a9e30112d..80bdbec506a9516b5a669ab205020706779aa0c1
100644
--- a/src/arm/simulator-arm.cc
+++ b/src/arm/simulator-arm.cc
@@ -331,7 +331,7 @@ void ArmDebugger::Debug() {
PrintF("\n");
}
}
- for (int i = 0; i < kNumVFPDoubleRegisters; i++) {
+ for (int i = 0; i < DwVfpRegister::NumRegisters(); i++) {
dvalue = GetVFPDoubleRegisterValue(i);
uint64_t as_words = BitCast<uint64_t>(dvalue);
PrintF("%3s: %f 0x%08x %08x\n",
--
--
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