Revision: 14863
Author: [email protected]
Date: Tue May 28 14:36:03 2013
Log: MIPS: Support Smi in CompareIDAndBranch

Port r14842 (1c8d7430)

BUG=

Review URL: https://codereview.chromium.org/15917012
http://code.google.com/p/v8/source/detail?r=14863

Modified:
 /branches/bleeding_edge/src/mips/lithium-codegen-mips.cc
 /branches/bleeding_edge/src/mips/lithium-mips.cc

=======================================
--- /branches/bleeding_edge/src/mips/lithium-codegen-mips.cc Mon May 27 16:02:27 2013 +++ /branches/bleeding_edge/src/mips/lithium-codegen-mips.cc Tue May 28 14:36:03 2013
@@ -2047,11 +2047,23 @@
 Operand cmp_right = Operand(0);

 if (right->IsConstantOperand()) {
- cmp_left = ToRegister(left);
- cmp_right = Operand(ToInteger32(LConstantOperand::cast(right)));
+ int32_t value = ToInteger32(LConstantOperand::cast(right));
+ if (instr->hydrogen_value()->representation().IsSmi()) {
+ cmp_left = ToRegister(left);
+ cmp_right = Operand(Smi::FromInt(value));
+ } else {
+ cmp_left = ToRegister(left);
+ cmp_right = Operand(value);
+ }
 } else if (left->IsConstantOperand()) {
- cmp_left = ToRegister(right);
- cmp_right = Operand(ToInteger32(LConstantOperand::cast(left)));
+ int32_t value = ToInteger32(LConstantOperand::cast(left));
+ if (instr->hydrogen_value()->representation().IsSmi()) {
+ cmp_left = ToRegister(right);
+ cmp_right = Operand(Smi::FromInt(value));
+ } else {
+ cmp_left = ToRegister(right);
+ cmp_right = Operand(value);
+ }
 // We transposed the operands. Reverse the condition.
 cond = ReverseCondition(cond);
 } else {
=======================================
--- /branches/bleeding_edge/src/mips/lithium-mips.cc Mon May 27 05:39:01 2013 +++ /branches/bleeding_edge/src/mips/lithium-mips.cc Tue May 28 14:36:03 2013
@@ -1554,9 +1554,10 @@
 LInstruction* LChunkBuilder::DoCompareIDAndBranch(
 HCompareIDAndBranch* instr) {
 Representation r = instr->representation();
- if (r.IsInteger32()) {
- ASSERT(instr->left()->representation().IsInteger32());
- ASSERT(instr->right()->representation().IsInteger32());
+ if (r.IsSmiOrInteger32()) {
+ ASSERT(instr->left()->representation().IsSmiOrInteger32());
+ ASSERT(instr->left()->representation().Equals(
+ instr->right()->representation()));
 LOperand* left = UseRegisterOrConstantAtStart(instr->left());
 LOperand* right = UseRegisterOrConstantAtStart(instr->right());
 return new(zone()) LCmpIDAndBranch(left, right);

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