Reviewers: danno, rossberg, Paul Lind, kisg, palfia,
Description:
MIPS: Use AST's type field and merge types for unary, binary & compare ICs.
Port r15264 (d4c3767)
right->fixed_right_arg().has_value case added also.
BUG=
Please review this at https://codereview.chromium.org/17552008/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files:
M src/mips/code-stubs-mips.cc
M src/mips/lithium-codegen-mips.cc
M src/mips/lithium-mips.cc
Index: src/mips/code-stubs-mips.cc
diff --git a/src/mips/code-stubs-mips.cc b/src/mips/code-stubs-mips.cc
index
cb597792a8d3557f02e5a4d889b6a790b99f5431..9c12a54a6a7bdcfe3f2659c3fdc9fb5f78d1019d
100644
--- a/src/mips/code-stubs-mips.cc
+++ b/src/mips/code-stubs-mips.cc
@@ -2326,7 +2326,7 @@ void BinaryOpStub_GenerateSmiCode(
void BinaryOpStub::GenerateSmiStub(MacroAssembler* masm) {
Label right_arg_changed, call_runtime;
- if (op_ == Token::MOD && has_fixed_right_arg_) {
+ if (op_ == Token::MOD && encoded_right_arg_.has_value) {
// It is guaranteed that the value will fit into a Smi, because if it
// didn't, we wouldn't be here, see BinaryOp_Patch.
__ Branch(&right_arg_changed,
@@ -2541,7 +2541,7 @@ void BinaryOpStub::GenerateInt32Stub(MacroAssembler*
masm) {
// to type transition.
} else {
- if (has_fixed_right_arg_) {
+ if (encoded_right_arg_.has_value) {
__ Move(f16, fixed_right_arg_value());
__ BranchF(&transition, NULL, ne, f14, f16);
}
Index: src/mips/lithium-codegen-mips.cc
diff --git a/src/mips/lithium-codegen-mips.cc
b/src/mips/lithium-codegen-mips.cc
index
d05cd28b46c34f3956e1948bc6896f539bfeec58..044b9c7c6d70c77903c9f2f3388145744db9a34f
100644
--- a/src/mips/lithium-codegen-mips.cc
+++ b/src/mips/lithium-codegen-mips.cc
@@ -1136,9 +1136,37 @@ void LCodeGen::DoModI(LModI* instr) {
__ And(result_reg, scratch, divisor - 1);
__ bind(&done);
- } else {
- // TODO(svenpanne) Add right->has_fixed_right_arg() case.
+ } else if (hmod->fixed_right_arg().has_value) {
+ const Register scratch = scratch0();
+ const Register left_reg = ToRegister(instr->left());
+ const Register result_reg = ToRegister(instr->result());
+
+ Register right_reg = EmitLoadRegister(instr->right(), scratch);
+
+ int32_t divisor = hmod->fixed_right_arg().value;
+ ASSERT(IsPowerOf2(divisor));
+ // Check if our assumption of a fixed right operand still holds.
+ DeoptimizeIf(ne, instr->environment(), right_reg, Operand(divisor));
+
+ Label left_is_not_negative, done;
+ if (left->CanBeNegative()) {
+ __ Branch(USE_DELAY_SLOT, &left_is_not_negative,
+ ge, left_reg, Operand(zero_reg));
+ __ subu(result_reg, zero_reg, left_reg);
+ __ And(result_reg, result_reg, divisor - 1);
+ if (hmod->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ DeoptimizeIf(eq, instr->environment(), result_reg,
Operand(zero_reg));
+ }
+ __ Branch(USE_DELAY_SLOT, &done);
+ __ subu(result_reg, zero_reg, result_reg);
+ }
+
+ __ bind(&left_is_not_negative);
+ __ And(result_reg, left_reg, divisor - 1);
+ __ bind(&done);
+
+ } else {
const Register scratch = scratch0();
const Register left_reg = ToRegister(instr->left());
const Register result_reg = ToRegister(instr->result());
Index: src/mips/lithium-mips.cc
diff --git a/src/mips/lithium-mips.cc b/src/mips/lithium-mips.cc
index
293ecb0a9a125a50aa31e4296234b2be1ea16461..c784f91b65d0fade53745773ef8cb8e96625bdba
100644
--- a/src/mips/lithium-mips.cc
+++ b/src/mips/lithium-mips.cc
@@ -1440,6 +1440,10 @@ LInstruction* LChunkBuilder::DoMod(HMod* instr) {
instr->CheckFlag(HValue::kBailoutOnMinusZero))
? AssignEnvironment(result)
: result;
+ } else if (instr->fixed_right_arg().has_value) {
+ LModI* mod = new(zone()) LModI(UseRegisterAtStart(left),
+ UseRegisterAtStart(right));
+ return AssignEnvironment(DefineAsRegister(mod));
} else {
LModI* mod = new(zone()) LModI(UseRegister(left),
UseRegister(right),
--
--
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