Revision: 16268
Author: [email protected]
Date: Thu Aug 22 11:58:20 2013 UTC
Log: Drop unused rdtsc instruction.
We do not use rdtsc anywhere and we won't ever use that in the
future, as it is totally unusable with multicore and out of
order execution.
[email protected]
Review URL: https://codereview.chromium.org/23112016
http://code.google.com/p/v8/source/detail?r=16268
Modified:
/branches/bleeding_edge/src/flag-definitions.h
/branches/bleeding_edge/src/ia32/assembler-ia32.cc
/branches/bleeding_edge/src/ia32/assembler-ia32.h
/branches/bleeding_edge/src/ia32/disasm-ia32.cc
/branches/bleeding_edge/src/platform-posix.cc
/branches/bleeding_edge/src/v8globals.h
/branches/bleeding_edge/src/x64/assembler-x64.cc
/branches/bleeding_edge/src/x64/assembler-x64.h
/branches/bleeding_edge/src/x64/disasm-x64.cc
/branches/bleeding_edge/test/cctest/test-disasm-ia32.cc
/branches/bleeding_edge/test/cctest/test-disasm-x64.cc
=======================================
--- /branches/bleeding_edge/src/flag-definitions.h Tue Aug 20 13:55:52 2013
UTC
+++ /branches/bleeding_edge/src/flag-definitions.h Thu Aug 22 11:58:20 2013
UTC
@@ -356,8 +356,6 @@
"enable use of SSE4.1 instructions if available")
DEFINE_bool(enable_cmov, true,
"enable use of CMOV instruction if available")
-DEFINE_bool(enable_rdtsc, true,
- "enable use of RDTSC instruction if available")
DEFINE_bool(enable_sahf, true,
"enable use of SAHF instruction if available (X64 only)")
DEFINE_bool(enable_vfp3, ENABLE_VFP3_DEFAULT,
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.cc Tue Aug 20 13:01:54
2013 UTC
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.cc Thu Aug 22 11:58:20
2013 UTC
@@ -1308,14 +1308,6 @@
EnsureSpace ensure_space(this);
EMIT(0x90);
}
-
-
-void Assembler::rdtsc() {
- ASSERT(IsEnabled(RDTSC));
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x31);
-}
void Assembler::ret(int imm16) {
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.h Tue Aug 20 13:01:54
2013 UTC
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.h Thu Aug 22 11:58:20
2013 UTC
@@ -537,7 +537,6 @@
if (f == SSE3 && !FLAG_enable_sse3) return false;
if (f == SSE4_1 && !FLAG_enable_sse4_1) return false;
if (f == CMOV && !FLAG_enable_cmov) return false;
- if (f == RDTSC && !FLAG_enable_rdtsc) return false;
return (supported_ & (static_cast<uint64_t>(1) << f)) != 0;
}
@@ -870,7 +869,6 @@
void hlt();
void int3();
void nop();
- void rdtsc();
void ret(int imm16);
// Label operations & relative jumps (PPUM Appendix D)
=======================================
--- /branches/bleeding_edge/src/ia32/disasm-ia32.cc Fri Jul 5 09:52:11
2013 UTC
+++ /branches/bleeding_edge/src/ia32/disasm-ia32.cc Thu Aug 22 11:58:20
2013 UTC
@@ -862,7 +862,6 @@
switch (f0byte) {
case 0x18: return "prefetch";
case 0xA2: return "cpuid";
- case 0x31: return "rdtsc";
case 0xBE: return "movsx_b";
case 0xBF: return "movsx_w";
case 0xB6: return "movzx_b";
=======================================
--- /branches/bleeding_edge/src/platform-posix.cc Wed Jul 31 07:51:46 2013
UTC
+++ /branches/bleeding_edge/src/platform-posix.cc Thu Aug 22 11:58:20 2013
UTC
@@ -83,7 +83,7 @@
// Mac OS X requires all these to install so we can assume they are
present.
// These constants are defined by the CPUid instructions.
const uint64_t one = 1;
- return (one << SSE2) | (one << CMOV) | (one << RDTSC) | (one << CPUID);
+ return (one << SSE2) | (one << CMOV) | (one << CPUID);
#else
return 0; // Nothing special about the other systems.
#endif
=======================================
--- /branches/bleeding_edge/src/v8globals.h Wed Aug 7 17:04:27 2013 UTC
+++ /branches/bleeding_edge/src/v8globals.h Thu Aug 22 11:58:20 2013 UTC
@@ -438,7 +438,6 @@
SSE3 = 32 + 0, // x86
SSE2 = 26, // x86
CMOV = 15, // x86
- RDTSC = 4, // x86
CPUID = 10, // x86
VFP3 = 1, // ARM
ARMv7 = 2, // ARM
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.cc Tue Aug 6 00:09:01
2013 UTC
+++ /branches/bleeding_edge/src/x64/assembler-x64.cc Thu Aug 22 11:58:20
2013 UTC
@@ -1917,13 +1917,6 @@
EnsureSpace ensure_space(this);
emit(0x9C);
}
-
-
-void Assembler::rdtsc() {
- EnsureSpace ensure_space(this);
- emit(0x0F);
- emit(0x31);
-}
void Assembler::ret(int imm16) {
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.h Tue Aug 6 00:09:01
2013 UTC
+++ /branches/bleeding_edge/src/x64/assembler-x64.h Thu Aug 22 11:58:20
2013 UTC
@@ -475,7 +475,6 @@
if (f == SSE3 && !FLAG_enable_sse3) return false;
if (f == SSE4_1 && !FLAG_enable_sse4_1) return false;
if (f == CMOV && !FLAG_enable_cmov) return false;
- if (f == RDTSC && !FLAG_enable_rdtsc) return false;
if (f == SAHF && !FLAG_enable_sahf) return false;
return (supported_ & (static_cast<uint64_t>(1) << f)) != 0;
}
@@ -1176,7 +1175,6 @@
void hlt();
void int3();
void nop();
- void rdtsc();
void ret(int imm16);
void setcc(Condition cc, Register reg);
=======================================
--- /branches/bleeding_edge/src/x64/disasm-x64.cc Fri Jul 5 09:52:11 2013
UTC
+++ /branches/bleeding_edge/src/x64/disasm-x64.cc Thu Aug 22 11:58:20 2013
UTC
@@ -1229,8 +1229,8 @@
current += PrintRightXMMOperand(current);
AppendToBuffer(", %s", NameOfXMMRegister(regop));
- } else if (opcode == 0xA2 || opcode == 0x31) {
- // RDTSC or CPUID
+ } else if (opcode == 0xA2) {
+ // CPUID
AppendToBuffer("%s", mnemonic);
} else if ((opcode & 0xF0) == 0x40) {
@@ -1294,8 +1294,6 @@
return "nop";
case 0x2A: // F2/F3 prefix.
return "cvtsi2s";
- case 0x31:
- return "rdtsc";
case 0x51: // F2 prefix.
return "sqrtsd";
case 0x58: // F2 prefix.
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Tue Jun 4
10:30:05 2013 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Thu Aug 22
11:58:20 2013 UTC
@@ -104,11 +104,6 @@
CpuFeatureScope fscope(&assm, CPUID);
__ cpuid();
}
- {
- CHECK(CpuFeatures::IsSupported(RDTSC));
- CpuFeatureScope fscope(&assm, RDTSC);
- __ rdtsc();
- }
__ movsx_b(edx, ecx);
__ movsx_w(edx, ecx);
__ movzx_b(edx, ecx);
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-x64.cc Wed Apr 10
08:29:39 2013 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-x64.cc Thu Aug 22
11:58:20 2013 UTC
@@ -95,11 +95,6 @@
CpuFeatures::Scope fscope(CPUID);
__ cpuid();
}
- {
- CHECK(CpuFeatures::IsSupported(RDTSC));
- CpuFeatures::Scope fscope(RDTSC);
- __ rdtsc();
- }
__ movsxbq(rdx, Operand(rcx, 0));
__ movsxwq(rdx, Operand(rcx, 0));
__ movzxbl(rdx, Operand(rcx, 0));
--
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
---
You received this message because you are subscribed to the Google Groups "v8-dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/groups/opt_out.
