Reviewers: Paul Lind, kisg, kilvadyb, danno, Jakob, Yang,

Message:
PTAL.

Description:
MIPS/ARM: Fix benchmarks failures on simulator.

The default x87 FPU precision is usually 80-bit extended precision,
which can lead to precision failures on several tests.
This patch fixes the precision failures on simulator by
setting the x87 FPU precision to 64-bit double precision.

TEST=benchmarks/sunspider/3d-cube, benchmarks/sunspider/3d-raytrace,
benchmarks/sunspider/access-nbody, benchmarks/sunspider/math-partial-sums

BUG=


Please review this at https://codereview.chromium.org/24067002/

SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge

Affected files (+41, -0 lines):
  M src/arm/simulator-arm.h
  M src/arm/simulator-arm.cc
  M src/mips/simulator-mips.h
  M src/mips/simulator-mips.cc


Index: src/arm/simulator-arm.cc
diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
index def18186305f102da97890f23af79d7facc14bdf..f2d304ba1af95a115826599491bd5de548dd402f 100644
--- a/src/arm/simulator-arm.cc
+++ b/src/arm/simulator-arm.cc
@@ -26,6 +26,7 @@
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 #include <stdlib.h>
+#include <fpu_control.h>
 #include <cmath>
 #include <cstdarg>
 #include "v8.h"
@@ -736,6 +737,8 @@ void Simulator::Initialize(Isolate* isolate) {


 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
+  set_host_fp_precision();
+
   i_cache_ = isolate_->simulator_i_cache();
   if (i_cache_ == NULL) {
     i_cache_ = new v8::internal::HashMap(&ICacheMatch);
@@ -3854,6 +3857,21 @@ uintptr_t Simulator::PopAddress() {
   return address;
 }

+
+void Simulator::set_host_fp_precision() {
+#if !V8_HOST_ARCH_ARM
+  // Set Intel x87 FPU mode to 64-bit double.
+  // The default FPU mode is extended (80-bit),
+  // which can lead to unexpected precision failures.
+  fpu_control_t cw;
+  _FPU_GETCW(cw);
+  cw &= ~_FPU_EXTENDED;
+  cw |= _FPU_DOUBLE;
+  _FPU_SETCW(cw);
+#endif
+}
+
+
 } }  // namespace v8::internal

 #endif  // USE_SIMULATOR
Index: src/arm/simulator-arm.h
diff --git a/src/arm/simulator-arm.h b/src/arm/simulator-arm.h
index 7fca7432bf704c143138d633e374370986d5bee8..63f0dad904ac6390ceb18c1c1bbc078fd0d9ce2e 100644
--- a/src/arm/simulator-arm.h
+++ b/src/arm/simulator-arm.h
@@ -435,6 +435,9 @@ class Simulator {
     char* desc;
   };
   StopCountAndDesc watched_stops_[kNumOfWatchedStops];
+
+  // Sets Intel x87 FPU precision to 64-bit.
+  inline void set_host_fp_precision();
 };


Index: src/mips/simulator-mips.cc
diff --git a/src/mips/simulator-mips.cc b/src/mips/simulator-mips.cc
index ea8b65948afe4732a4867024ac93c075d8220cff..1cb330a804115914711e7d88dbcd93f207d2a544 100644
--- a/src/mips/simulator-mips.cc
+++ b/src/mips/simulator-mips.cc
@@ -27,6 +27,7 @@

 #include <stdlib.h>
 #include <limits.h>
+#include <fpu_control.h>
 #include <cmath>
 #include <cstdarg>
 #include "v8.h"
@@ -882,6 +883,8 @@ void Simulator::Initialize(Isolate* isolate) {


 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
+  set_host_fp_precision();
+
   i_cache_ = isolate_->simulator_i_cache();
   if (i_cache_ == NULL) {
     i_cache_ = new v8::internal::HashMap(&ICacheMatch);
@@ -2917,6 +2920,20 @@ uintptr_t Simulator::PopAddress() {
 }


+void Simulator::set_host_fp_precision() {
+#if !V8_HOST_ARCH_MIPS
+  // Set Intel x87 FPU mode to 64-bit double.
+  // The default FPU mode is extended (80-bit),
+  // which can lead to unexpected precision failures.
+  fpu_control_t cw;
+  _FPU_GETCW(cw);
+  cw &= ~_FPU_EXTENDED;
+  cw |= _FPU_DOUBLE;
+  _FPU_SETCW(cw);
+#endif
+}
+
+
 #undef UNSUPPORTED

 } }  // namespace v8::internal
Index: src/mips/simulator-mips.h
diff --git a/src/mips/simulator-mips.h b/src/mips/simulator-mips.h
index 601cd6d99d113c867419fac06ffdcbc3de5f938c..87a4ffe07179691b59dea9f5d2d63dcb754b3601 100644
--- a/src/mips/simulator-mips.h
+++ b/src/mips/simulator-mips.h
@@ -395,6 +395,9 @@ class Simulator {
     char* desc;
   };
   StopCountAndDesc watched_stops_[kMaxStopCode + 1];
+
+  // Sets Intel x87 FPU precision to 64-bit.
+  inline void set_host_fp_precision();
 };




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