Reviewers: kisg, palfia, kilvadyb, Jakob,
Message:
PTAL.
Description:
MIPS: Fix simulator divide for overflow case.
TEST=mjsunit/div-mul-minus-one.js
BUG=
Please review this at https://codereview.chromium.org/24956002/
SVN Base: git://github.com/v8/v8.git@gbl
Affected files (+7, -3 lines):
M src/mips/simulator-mips.cc
Index: src/mips/simulator-mips.cc
diff --git a/src/mips/simulator-mips.cc b/src/mips/simulator-mips.cc
index
ea8b65948afe4732a4867024ac93c075d8220cff..5a96efe9c1d529338f10b6a0e657804d74e59ce8
100644
--- a/src/mips/simulator-mips.cc
+++ b/src/mips/simulator-mips.cc
@@ -2274,9 +2274,13 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
break;
case DIV:
// Divide by zero and overflow was not checked in the
configuration
- // step - div and divu do not raise exceptions. On division by 0
and
- // on overflow (INT_MIN/-1), the result will be UNPREDICTABLE.
- if (rt != 0 && !(rs == INT_MIN && rt == -1)) {
+ // step - div and divu do not raise exceptions. On division by 0
+ // the result will be UNPREDICTABLE. On overflow (INT_MIN/-1),
+ // return INT_MIN which is what the hardware does.
+ if (rs == INT_MIN && rt == -1) {
+ set_register(LO, INT_MIN);
+ set_register(HI, 0);
+ } else if (rt != 0) {
set_register(LO, rs / rt);
set_register(HI, rs % rt);
}
--
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