Reviewers: Benedikt Meurer, ulan,
Message:
Minor space saving, only affect crankshaft.
Description:
ARM: use vstm/vldm when possible.
BUG=none
TEST=none
LOG=N
Please review this at https://codereview.chromium.org/74193004/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+18, -8 lines):
M src/arm/assembler-arm-inl.h
M src/arm/assembler-arm.h
M src/arm/macro-assembler-arm.cc
Index: src/arm/assembler-arm-inl.h
diff --git a/src/arm/assembler-arm-inl.h b/src/arm/assembler-arm-inl.h
index
f93a9a6003b8ab7db2105692fc084e92f5c96bdb..24c5ccafdb974f192d883e2af181685c0161ec41
100644
--- a/src/arm/assembler-arm-inl.h
+++ b/src/arm/assembler-arm-inl.h
@@ -57,6 +57,11 @@ int DwVfpRegister::NumRegisters() {
}
+int DwVfpRegister::NumReservedRegisters() {
+ return kNumReservedRegisters;
+}
+
+
int DwVfpRegister::NumAllocatableRegisters() {
return NumRegisters() - kNumReservedRegisters;
}
Index: src/arm/assembler-arm.h
diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h
index
55e6f9ab2393e910b8bfc212ae4bc0e364a0ea84..137dd73e992549c5b3069b218b5ef8a2f5480fc7
100644
--- a/src/arm/assembler-arm.h
+++ b/src/arm/assembler-arm.h
@@ -285,6 +285,7 @@ struct DwVfpRegister {
// Any code included in the snapshot must be able to run both with 16 or
32
// registers.
inline static int NumRegisters();
+ inline static int NumReservedRegisters();
inline static int NumAllocatableRegisters();
inline static int ToAllocationIndex(DwVfpRegister reg);
Index: src/arm/macro-assembler-arm.cc
diff --git a/src/arm/macro-assembler-arm.cc b/src/arm/macro-assembler-arm.cc
index
bcc985ac5a074e9ae14892d159e5c7cd1afd52b4..90601952299e31a4210e2b9dccbbb489991a45c8
100644
--- a/src/arm/macro-assembler-arm.cc
+++ b/src/arm/macro-assembler-arm.cc
@@ -620,22 +620,26 @@ void
MacroAssembler::PushSafepointRegistersAndDoubles() {
// Number of d-regs not known at snapshot time.
ASSERT(!Serializer::enabled());
PushSafepointRegisters();
- sub(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() *
- kDoubleSize));
- for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) {
- vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize);
+ // Only save allocatable registers.
+ ASSERT(kScratchDoubleReg.is(d15) && kDoubleRegZero.is(d14));
+ ASSERT(DwVfpRegister::NumReservedRegisters() == 2);
+ if (CpuFeatures::IsSupported(VFP32DREGS)) {
+ vstm(db_w, sp, d16, d31);
}
+ vstm(db_w, sp, d0, d13);
}
void MacroAssembler::PopSafepointRegistersAndDoubles() {
// Number of d-regs not known at snapshot time.
ASSERT(!Serializer::enabled());
- for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) {
- vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize);
+ // Only save allocatable registers.
+ ASSERT(kScratchDoubleReg.is(d15) && kDoubleRegZero.is(d14));
+ ASSERT(DwVfpRegister::NumReservedRegisters() == 2);
+ vldm(ia_w, sp, d0, d13);
+ if (CpuFeatures::IsSupported(VFP32DREGS)) {
+ vldm(ia_w, sp, d16, d31);
}
- add(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() *
- kDoubleSize));
PopSafepointRegisters();
}
--
--
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