Revision: 17854
Author: [email protected]
Date: Tue Nov 19 06:39:36 2013 UTC
Log: ARM: use vstm/vldm when possible.
[email protected]
Review URL: https://codereview.chromium.org/74193004
Patch from Rodolph Perfetta <[email protected]>.
http://code.google.com/p/v8/source/detail?r=17854
Modified:
/branches/bleeding_edge/src/arm/assembler-arm-inl.h
/branches/bleeding_edge/src/arm/assembler-arm.h
/branches/bleeding_edge/src/arm/macro-assembler-arm.cc
=======================================
--- /branches/bleeding_edge/src/arm/assembler-arm-inl.h Thu Nov 7 08:23:09
2013 UTC
+++ /branches/bleeding_edge/src/arm/assembler-arm-inl.h Tue Nov 19 06:39:36
2013 UTC
@@ -55,6 +55,11 @@
int DwVfpRegister::NumRegisters() {
return CpuFeatures::IsSupported(VFP32DREGS) ? 32 : 16;
}
+
+
+int DwVfpRegister::NumReservedRegisters() {
+ return kNumReservedRegisters;
+}
int DwVfpRegister::NumAllocatableRegisters() {
=======================================
--- /branches/bleeding_edge/src/arm/assembler-arm.h Fri Nov 15 12:24:10
2013 UTC
+++ /branches/bleeding_edge/src/arm/assembler-arm.h Tue Nov 19 06:39:36
2013 UTC
@@ -285,6 +285,7 @@
// Any code included in the snapshot must be able to run both with 16 or
32
// registers.
inline static int NumRegisters();
+ inline static int NumReservedRegisters();
inline static int NumAllocatableRegisters();
inline static int ToAllocationIndex(DwVfpRegister reg);
=======================================
--- /branches/bleeding_edge/src/arm/macro-assembler-arm.cc Mon Nov 18
11:44:06 2013 UTC
+++ /branches/bleeding_edge/src/arm/macro-assembler-arm.cc Tue Nov 19
06:39:36 2013 UTC
@@ -620,22 +620,26 @@
// Number of d-regs not known at snapshot time.
ASSERT(!Serializer::enabled());
PushSafepointRegisters();
- sub(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() *
- kDoubleSize));
- for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) {
- vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize);
+ // Only save allocatable registers.
+ ASSERT(kScratchDoubleReg.is(d15) && kDoubleRegZero.is(d14));
+ ASSERT(DwVfpRegister::NumReservedRegisters() == 2);
+ if (CpuFeatures::IsSupported(VFP32DREGS)) {
+ vstm(db_w, sp, d16, d31);
}
+ vstm(db_w, sp, d0, d13);
}
void MacroAssembler::PopSafepointRegistersAndDoubles() {
// Number of d-regs not known at snapshot time.
ASSERT(!Serializer::enabled());
- for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) {
- vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize);
+ // Only save allocatable registers.
+ ASSERT(kScratchDoubleReg.is(d15) && kDoubleRegZero.is(d14));
+ ASSERT(DwVfpRegister::NumReservedRegisters() == 2);
+ vldm(ia_w, sp, d0, d13);
+ if (CpuFeatures::IsSupported(VFP32DREGS)) {
+ vldm(ia_w, sp, d16, d31);
}
- add(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() *
- kDoubleSize));
PopSafepointRegisters();
}
--
--
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