Reviewers: Paul Lind, kilvadyb, kisg, danno, Toon Verwaest,
Message:
PTAL.
Description:
MIPS: Fix popping order on ARM.
Port r18291 (f5a50cf3)
BUG=
Please review this at https://codereview.chromium.org/111933004/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+1, -1 lines):
M src/mips/stub-cache-mips.cc
Index: src/mips/stub-cache-mips.cc
diff --git a/src/mips/stub-cache-mips.cc b/src/mips/stub-cache-mips.cc
index
8e379f73c5c42fabbe6ccb2db59cc4bc903ad2a0..0b84e5ab1a69193e67e537e8557b879879521b03
100644
--- a/src/mips/stub-cache-mips.cc
+++ b/src/mips/stub-cache-mips.cc
@@ -1082,9 +1082,9 @@ class CallInterceptorCompiler BASE_EMBEDDED {
CompileCallLoadPropertyWithInterceptor(
masm, receiver, holder, name_, holder_obj,
IC::kLoadPropertyWithInterceptorOnly);
- __ pop(receiver);
__ pop(name_);
__ pop(holder);
+ __ pop(receiver);
}
// If interceptor returns no-result sentinel, call the constant
function.
__ LoadRoot(scratch, Heap::kNoInterceptorResultSentinelRootIndex);
--
--
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