Revision: 18295
Author: [email protected]
Date: Tue Dec 10 23:03:56 2013 UTC
Log: MIPS: Fix popping order on ARM.
Port r18291 (f5a50cf3)
BUG=
[email protected]
Review URL: https://codereview.chromium.org/111933004
http://code.google.com/p/v8/source/detail?r=18295
Modified:
/branches/bleeding_edge/src/mips/stub-cache-mips.cc
=======================================
--- /branches/bleeding_edge/src/mips/stub-cache-mips.cc Tue Dec 10 23:01:40
2013 UTC
+++ /branches/bleeding_edge/src/mips/stub-cache-mips.cc Tue Dec 10 23:03:56
2013 UTC
@@ -1082,9 +1082,9 @@
CompileCallLoadPropertyWithInterceptor(
masm, receiver, holder, name_, holder_obj,
IC::kLoadPropertyWithInterceptorOnly);
- __ pop(receiver);
__ pop(name_);
__ pop(holder);
+ __ pop(receiver);
}
// If interceptor returns no-result sentinel, call the constant
function.
__ LoadRoot(scratch, Heap::kNoInterceptorResultSentinelRootIndex);
--
--
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