Revision: 18445
Author: [email protected]
Date: Thu Jan 2 16:36:21 2014 UTC
Log: ARM: Optimize truncating division and fix sim
Optimize code generated for DivI Lithium instruction when handling division
where the result is int32. Also, fix the ARM simulator to give the correct
answer for kMinInt / -1.
TEST=Division tests added to test-assembler-arm.cc
BUG=
[email protected]
Review URL: https://codereview.chromium.org/102623003
http://code.google.com/p/v8/source/detail?r=18445
Modified:
/branches/bleeding_edge/src/arm/lithium-codegen-arm.cc
/branches/bleeding_edge/src/arm/simulator-arm.cc
/branches/bleeding_edge/test/cctest/test-assembler-arm.cc
=======================================
--- /branches/bleeding_edge/src/arm/lithium-codegen-arm.cc Thu Jan 2
06:49:09 2014 UTC
+++ /branches/bleeding_edge/src/arm/lithium-codegen-arm.cc Thu Jan 2
16:36:21 2014 UTC
@@ -1408,7 +1408,11 @@
}
// Check for (kMinInt / -1).
- if (instr->hydrogen()->CheckFlag(HValue::kCanOverflow)) {
+ if (instr->hydrogen()->CheckFlag(HValue::kCanOverflow) &&
+ (!CpuFeatures::IsSupported(SUDIV) ||
+ !instr->hydrogen()->CheckFlag(HValue::kAllUsesTruncatingToInt32))) {
+ // We don't need to check for overflow when truncating with sdiv
+ // support because, on ARM, sdiv kMinInt, -1 -> kMinInt.
__ cmp(left, Operand(kMinInt));
__ cmp(right, Operand(-1), eq);
DeoptimizeIf(eq, instr->environment());
=======================================
--- /branches/bleeding_edge/src/arm/simulator-arm.cc Wed Sep 18 15:13:18
2013 UTC
+++ /branches/bleeding_edge/src/arm/simulator-arm.cc Thu Jan 2 16:36:21
2014 UTC
@@ -2733,7 +2733,11 @@
int32_t rs_val = get_register(rs);
int32_t ret_val = 0;
ASSERT(rs_val != 0);
- ret_val = rm_val/rs_val;
+ if ((rm_val == kMinInt) && (rs_val == -1)) {
+ ret_val = kMinInt;
+ } else {
+ ret_val = rm_val / rs_val;
+ }
set_register(rn, ret_val);
return;
}
=======================================
--- /branches/bleeding_edge/test/cctest/test-assembler-arm.cc Thu Sep 19
13:30:47 2013 UTC
+++ /branches/bleeding_edge/test/cctest/test-assembler-arm.cc Thu Jan 2
16:36:21 2014 UTC
@@ -1437,6 +1437,72 @@
__ bind(&target);
__ nop();
}
+
+
+#define TEST_SDIV(expected_, dividend_, divisor_) \
+ t.dividend = dividend_; \
+ t.divisor = divisor_; \
+ t.result = 0; \
+ dummy = CALL_GENERATED_CODE(f, &t, 0, 0, 0, 0); \
+ CHECK_EQ(expected_, t.result);
+
+
+TEST(18) {
+ // Test the sdiv.
+ CcTest::InitializeVM();
+ Isolate* isolate = CcTest::i_isolate();
+ HandleScope scope(isolate);
+
+ typedef struct {
+ uint32_t dividend;
+ uint32_t divisor;
+ uint32_t result;
+ } T;
+ T t;
+
+ Assembler assm(isolate, NULL, 0);
+
+ if (CpuFeatures::IsSupported(SUDIV)) {
+ CpuFeatureScope scope(&assm, SUDIV);
+
+ __ mov(r3, Operand(r0));
+
+ __ ldr(r0, MemOperand(r3, OFFSET_OF(T, dividend)));
+ __ ldr(r1, MemOperand(r3, OFFSET_OF(T, divisor)));
+
+ __ sdiv(r2, r0, r1);
+ __ str(r2, MemOperand(r3, OFFSET_OF(T, result)));
+
+ __ bx(lr);
+
+ CodeDesc desc;
+ assm.GetCode(&desc);
+ Object* code = isolate->heap()->CreateCode(
+ desc,
+ Code::ComputeFlags(Code::STUB),
+ Handle<Code>())->ToObjectChecked();
+ CHECK(code->IsCode());
+#ifdef DEBUG
+ Code::cast(code)->Print();
+#endif
+ F3 f = FUNCTION_CAST<F3>(Code::cast(code)->entry());
+ Object* dummy;
+ TEST_SDIV(1073741824, kMinInt, -2);
+ TEST_SDIV(kMinInt, kMinInt, -1);
+ TEST_SDIV(5, 10, 2);
+ TEST_SDIV(3, 10, 3);
+ TEST_SDIV(-5, 10, -2);
+ TEST_SDIV(-3, 10, -3);
+ TEST_SDIV(-5, -10, 2);
+ TEST_SDIV(-3, -10, 3);
+ TEST_SDIV(5, -10, -2);
+ TEST_SDIV(3, -10, -3);
+ USE(dummy);
+ }
+}
+
+
+#undef TEST_SDIV
TEST(code_relative_offset) {
--
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
---
You received this message because you are subscribed to the Google Groups "v8-dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/groups/opt_out.
