Revision: 18640
Author:   [email protected]
Date:     Thu Jan 16 11:35:30 2014 UTC
Log:      Update load_rax and store_rax to support X32

[email protected]

Review URL: https://codereview.chromium.org/103843002
http://code.google.com/p/v8/source/detail?r=18640

Modified:
 /branches/bleeding_edge/src/x64/assembler-x64.cc

=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.cc Wed Jan 8 07:02:02 2014 UTC +++ /branches/bleeding_edge/src/x64/assembler-x64.cc Thu Jan 16 11:35:30 2014 UTC
@@ -1305,9 +1305,19 @@

 void Assembler::load_rax(void* value, RelocInfo::Mode mode) {
   EnsureSpace ensure_space(this);
-  emit(0x48);  // REX.W
-  emit(0xA1);
-  emitp(value, mode);
+  if (kPointerSize == kInt64Size) {
+    emit(0x48);  // REX.W
+    emit(0xA1);
+    emitp(value, mode);
+  } else {
+    ASSERT(kPointerSize == kInt32Size);
+    emit(0xA1);
+    emitp(value, mode);
+    // In 64-bit mode, need to zero extend the operand to 8 bytes.
+    // See 2.2.1.4 in Intel64 and IA32 Architectures Software
+    // Developer's Manual Volume 2.
+    emitl(0);
+  }
 }


@@ -1888,9 +1898,19 @@

 void Assembler::store_rax(void* dst, RelocInfo::Mode mode) {
   EnsureSpace ensure_space(this);
-  emit(0x48);  // REX.W
-  emit(0xA3);
-  emitp(dst, mode);
+  if (kPointerSize == kInt64Size) {
+    emit(0x48);  // REX.W
+    emit(0xA3);
+    emitp(dst, mode);
+  } else {
+    ASSERT(kPointerSize == kInt32Size);
+    emit(0xA3);
+    emitp(dst, mode);
+    // In 64-bit mode, need to zero extend the operand to 8 bytes.
+    // See 2.2.1.4 in Intel64 and IA32 Architectures Software
+    // Developer's Manual Volume 2.
+    emitl(0);
+  }
 }


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