Reviewers: baptiste.afsa1, ulan,
Description:
A64: Implement LOsrEntry and LUnknownOSRValue
BUG=314606
[email protected],[email protected]
Please review this at https://codereview.chromium.org/145713002/
SVN Base: https://v8.googlecode.com/svn/branches/experimental/a64
Affected files (+64, -9 lines):
M src/a64/lithium-a64.h
M src/a64/lithium-a64.cc
M src/a64/lithium-codegen-a64.cc
Index: src/a64/lithium-a64.cc
diff --git a/src/a64/lithium-a64.cc b/src/a64/lithium-a64.cc
index
0d9b44c47c613d3c00a358319c0b1104e1c05d00..d800cbb5f0f1696df2cd3bd4208b3c8dd94aa8de
100644
--- a/src/a64/lithium-a64.cc
+++ b/src/a64/lithium-a64.cc
@@ -43,6 +43,32 @@ LITHIUM_CONCRETE_INSTRUCTION_LIST(DEFINE_COMPILE)
#undef DEFINE_COMPILE
+LOsrEntry::LOsrEntry() {
+ for (int i = 0; i < Register::NumAllocatableRegisters(); ++i) {
+ register_spills_[i] = NULL;
+ }
+ for (int i = 0; i < DoubleRegister::NumAllocatableRegisters(); ++i) {
+ double_register_spills_[i] = NULL;
+ }
+}
+
+
+void LOsrEntry::MarkSpilledRegister(int allocation_index,
+ LOperand* spill_operand) {
+ ASSERT(spill_operand->IsStackSlot());
+ ASSERT(register_spills_[allocation_index] == NULL);
+ register_spills_[allocation_index] = spill_operand;
+}
+
+
+void LOsrEntry::MarkSpilledDoubleRegister(int allocation_index,
+ LOperand* spill_operand) {
+ ASSERT(spill_operand->IsDoubleStackSlot());
+ ASSERT(double_register_spills_[allocation_index] == NULL);
+ double_register_spills_[allocation_index] = spill_operand;
+}
+
+
void LLabel::PrintDataTo(StringStream* stream) {
LGap::PrintDataTo(stream);
LLabel* rep = replacement();
@@ -1823,7 +1849,10 @@ LInstruction*
LChunkBuilder::DoNumericConstraint(HNumericConstraint* instr) {
LInstruction* LChunkBuilder::DoOsrEntry(HOsrEntry* instr) {
- UNIMPLEMENTED_INSTRUCTION();
+ ASSERT(argument_count_ == 0);
+ allocator_->MarkAsOsrEntry();
+ current_block_->last_environment()->set_ast_id(instr->ast_id());
+ return AssignEnvironment(new(zone()) LOsrEntry);
}
@@ -2402,7 +2431,12 @@ LInstruction*
LChunkBuilder::DoUnaryMathOperation(HUnaryMathOperation* instr) {
LInstruction* LChunkBuilder::DoUnknownOSRValue(HUnknownOSRValue* instr) {
- UNIMPLEMENTED_INSTRUCTION();
+ int spill_index = chunk_->GetNextSpillIndex();
+ if (spill_index > LUnallocated::kMaxFixedSlotIndex) {
+ Abort("Too many spill slots needed for OSR");
+ spill_index = 0;
+ }
+ return DefineAsSpilled(new(zone()) LUnknownOSRValue, spill_index);
}
Index: src/a64/lithium-a64.h
diff --git a/src/a64/lithium-a64.h b/src/a64/lithium-a64.h
index
f011364d1e42555bc081981e3773b094868e7127..93fec8ac2b2a4cbf42a8ab36aabda637f51a36df
100644
--- a/src/a64/lithium-a64.h
+++ b/src/a64/lithium-a64.h
@@ -188,6 +188,7 @@ class LCodeGen;
V(Typeof) \
V(TypeofIsAndBranch) \
V(Uint32ToDouble) \
+ V(UnknownOSRValue) \
V(ValueOf) \
V(CheckMapValue) \
V(LoadFieldByIndex) \
@@ -317,6 +318,13 @@ class LTemplateInstruction: public LInstruction {
};
+class LUnknownOSRValue: public LTemplateInstruction<1, 0, 0> {
+ public:
+ virtual bool HasInterestingComment(LCodeGen* gen) const { return false; }
+ DECLARE_CONCRETE_INSTRUCTION(UnknownOSRValue, "unknown-osr-value")
+};
+
+
template<int I, int T>
class LControlInstruction: public LTemplateInstruction<0, I, T> {
public:
@@ -522,13 +530,9 @@ class LOsrEntry: public LTemplateInstruction<0, 0, 0> {
LOperand** SpilledRegisterArray() { return register_spills_; }
LOperand** SpilledDoubleRegisterArray() { return
double_register_spills_; }
- void MarkSpilledRegister(int allocation_index, LOperand* spill_operand) {
- UNIMPLEMENTED();
- }
+ void MarkSpilledRegister(int allocation_index, LOperand* spill_operand);
void MarkSpilledDoubleRegister(int allocation_index,
- LOperand* spill_operand) {
- UNIMPLEMENTED();
- }
+ LOperand* spill_operand);
private:
// Arrays of spill slot operands for registers with an assigned spill
Index: src/a64/lithium-codegen-a64.cc
diff --git a/src/a64/lithium-codegen-a64.cc b/src/a64/lithium-codegen-a64.cc
index
7ab8cb71cdc7223b82dfbb74b4eb97b122b1450f..31ea70dbd8903c2e234ff71fb44e20f1352f039a
100644
--- a/src/a64/lithium-codegen-a64.cc
+++ b/src/a64/lithium-codegen-a64.cc
@@ -1831,6 +1831,11 @@ void LCodeGen::DoCallStub(LCallStub* instr) {
}
+void LCodeGen::DoUnknownOSRValue(LUnknownOSRValue* instr) {
+ // Nothing to do.
+}
+
+
void LCodeGen::DoCheckMaps(LCheckMaps* instr) {
Register object = ToRegister(instr->value());
Register map_reg = ToRegister(instr->temp());
@@ -4162,7 +4167,19 @@ void LCodeGen::DoNumberUntagD(LNumberUntagD* instr) {
void LCodeGen::DoOsrEntry(LOsrEntry* instr) {
- ASM_UNIMPLEMENTED_BREAK("DoOsrEntry");
+ // This is a pseudo-instruction that ensures that the environment here is
+ // properly registered for deoptimization and records the assembler's PC
+ // offset.
+ LEnvironment* environment = instr->environment();
+ environment->SetSpilledRegisters(instr->SpilledRegisterArray(),
+ instr->SpilledDoubleRegisterArray());
+
+ // If the environment were already registered, we would have no way of
+ // backpatching it with the spill slot operands.
+ ASSERT(!environment->HasBeenRegistered());
+ RegisterEnvironmentForDeoptimization(environment,
Safepoint::kNoLazyDeopt);
+ ASSERT(osr_pc_offset_ == -1);
+ osr_pc_offset_ = masm()->pc_offset();
}
--
--
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