Reviewers: baptiste.afsa1,
Description:
A64: Add LGetCachedArrayIndex and LHasCachedArrayIndexAndBranch
BUG=none
Please review this at https://codereview.chromium.org/146893002/
SVN Base: https://v8.googlecode.com/svn/branches/experimental/a64
Affected files (+72, -2 lines):
M src/a64/lithium-a64.h
M src/a64/lithium-a64.cc
M src/a64/lithium-codegen-a64.cc
Index: src/a64/lithium-a64.cc
diff --git a/src/a64/lithium-a64.cc b/src/a64/lithium-a64.cc
index
a2071a2608aa1a18ed9889b0e28934ca22fa0033..dbcb4e118f85c11c54109340755f8cf7f9f34c72
100644
--- a/src/a64/lithium-a64.cc
+++ b/src/a64/lithium-a64.cc
@@ -131,6 +131,13 @@ void LCmpIDAndBranch::PrintDataTo(StringStream*
stream) {
}
+void LHasCachedArrayIndexAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if has_cached_array_index(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
bool LGoto::HasInterestingComment(LCodeGen* gen) const {
return !gen->IsNextEmittedBlock(block_id());
}
@@ -1457,7 +1464,9 @@ LInstruction*
LChunkBuilder::DoFunctionLiteral(HFunctionLiteral* instr) {
LInstruction* LChunkBuilder::DoGetCachedArrayIndex(
HGetCachedArrayIndex* instr) {
- UNIMPLEMENTED_INSTRUCTION();
+ ASSERT(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegisterAtStart(instr->value());
+ return DefineAsRegister(new(zone()) LGetCachedArrayIndex(value));
}
@@ -1480,7 +1489,9 @@ LInstruction* LChunkBuilder::DoGoto(HGoto* instr) {
LInstruction* LChunkBuilder::DoHasCachedArrayIndexAndBranch(
HHasCachedArrayIndexAndBranch* instr) {
- UNIMPLEMENTED_INSTRUCTION();
+ ASSERT(instr->value()->representation().IsTagged());
+ return new(zone()) LHasCachedArrayIndexAndBranch(
+ UseRegisterAtStart(instr->value()), TempRegister());
}
Index: src/a64/lithium-a64.h
diff --git a/src/a64/lithium-a64.h b/src/a64/lithium-a64.h
index
d040f95a352f2ed80fbb278ba8a12b18c78a5ae5..722580c417a63dd190dcae51f2deffa1bb5f5277
100644
--- a/src/a64/lithium-a64.h
+++ b/src/a64/lithium-a64.h
@@ -103,9 +103,11 @@ class LCodeGen;
V(ForInCacheArray) \
V(ForInPrepareMap) \
V(FunctionLiteral) \
+ V(GetCachedArrayIndex) \
V(GlobalObject) \
V(GlobalReceiver) \
V(Goto) \
+ V(HasCachedArrayIndexAndBranch) \
V(HasInstanceTypeAndBranch) \
V(In) \
V(InnerAllocatedObject) \
@@ -1294,6 +1296,19 @@ class LForInPrepareMap: public
LTemplateInstruction<1, 1, 0> {
};
+class LGetCachedArrayIndex: public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LGetCachedArrayIndex(LOperand* value) {
+ inputs_[0] = value;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+
+
DECLARE_CONCRETE_INSTRUCTION(GetCachedArrayIndex, "get-cached-array-index")
+ DECLARE_HYDROGEN_ACCESSOR(GetCachedArrayIndex)
+};
+
+
class LGlobalObject: public LTemplateInstruction<1, 1, 0> {
public:
explicit LGlobalObject(LOperand* context) {
@@ -1318,6 +1333,24 @@ class LGlobalReceiver: public
LTemplateInstruction<1, 1, 0> {
};
+class LHasCachedArrayIndexAndBranch: public LControlInstruction<1, 1> {
+ public:
+ LHasCachedArrayIndexAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(HasCachedArrayIndexAndBranch,
+ "has-cached-array-index-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(HasCachedArrayIndexAndBranch)
+
+ virtual void PrintDataTo(StringStream* stream);
+};
+
+
class LHasInstanceTypeAndBranch: public LControlInstruction<1, 1> {
public:
LHasInstanceTypeAndBranch(LOperand* value, LOperand* temp) {
Index: src/a64/lithium-codegen-a64.cc
diff --git a/src/a64/lithium-codegen-a64.cc b/src/a64/lithium-codegen-a64.cc
index
af06bf5b751b789ed0d0a53737749e2f5bda9137..e986b8318a2a315a35bd0903b5769a5699144353
100644
--- a/src/a64/lithium-codegen-a64.cc
+++ b/src/a64/lithium-codegen-a64.cc
@@ -2680,6 +2680,19 @@ void LCodeGen::DoForInPrepareMap(LForInPrepareMap*
instr) {
}
+void LCodeGen::DoGetCachedArrayIndex(LGetCachedArrayIndex* instr) {
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+
+ __ AssertString(input);
+
+ // Assert that we can use a W register load to get the hash.
+ ASSERT((String::kHashShift + String::kArrayIndexValueBits) < kWRegSize);
+ __ Ldr(result.W(), FieldMemOperand(input, String::kHashFieldOffset));
+ __ IndexFromHash(result, result);
+}
+
+
void LCodeGen::DoGlobalObject(LGlobalObject* instr) {
Register result = ToRegister(instr->result());
__ Ldr(result, GlobalObjectMemOperand());
@@ -2714,6 +2727,19 @@ void LCodeGen::DoGoto(LGoto* instr) {
}
+void LCodeGen::DoHasCachedArrayIndexAndBranch(
+ LHasCachedArrayIndexAndBranch* instr) {
+ Register input = ToRegister(instr->value());
+ Register temp = ToRegister32(instr->temp());
+
+ // Assert that the cache status bits fit in a W register.
+ ASSERT(is_uint32(String::kContainsCachedArrayIndexMask));
+ __ Ldr(temp, FieldMemOperand(input, String::kHashFieldOffset));
+ __ Tst(temp, String::kContainsCachedArrayIndexMask);
+ EmitBranch(instr, eq);
+}
+
+
// HHasInstanceTypeAndBranch instruction is built with an interval of type
// to test but is only used in very restricted ways. The only possible
kinds
// of intervals are:
--
--
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