Revision: 19415
Author:   [email protected]
Date:     Mon Feb 17 15:20:54 2014 UTC
Log:      make a64 compile on mavericks - part 1

[email protected]

BUG=

Review URL: https://codereview.chromium.org/169523005
http://code.google.com/p/v8/source/detail?r=19415

Modified:
 /branches/bleeding_edge/src/a64/assembler-a64.cc
 /branches/bleeding_edge/src/a64/assembler-a64.h
 /branches/bleeding_edge/src/a64/codegen-a64.cc
 /branches/bleeding_edge/src/a64/simulator-a64.cc
 /branches/bleeding_edge/src/a64/simulator-a64.h
 /branches/bleeding_edge/test/cctest/test-assembler-a64.cc
 /branches/bleeding_edge/test/cctest/test-utils-a64.cc
 /branches/bleeding_edge/test/cctest/test-utils-a64.h

=======================================
--- /branches/bleeding_edge/src/a64/assembler-a64.cc Mon Feb 17 15:09:46 2014 UTC +++ /branches/bleeding_edge/src/a64/assembler-a64.cc Mon Feb 17 15:20:54 2014 UTC
@@ -2302,7 +2302,7 @@
 }


-void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, int64_t data) {
+void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
   // We do not try to reuse pool constants.
   RelocInfo rinfo(reinterpret_cast<byte*>(pc_), rmode, data, NULL);
   if (((rmode >= RelocInfo::JS_RETURN) &&
=======================================
--- /branches/bleeding_edge/src/a64/assembler-a64.h Mon Feb 17 15:09:46 2014 UTC +++ /branches/bleeding_edge/src/a64/assembler-a64.h Mon Feb 17 15:20:54 2014 UTC
@@ -56,8 +56,8 @@

 // Some CPURegister methods can return Register and FPRegister types, so we
 // need to declare them in advance.
-class Register;
-class FPRegister;
+struct Register;
+struct FPRegister;


 struct CPURegister {
=======================================
--- /branches/bleeding_edge/src/a64/codegen-a64.cc Wed Feb 12 09:19:30 2014 UTC +++ /branches/bleeding_edge/src/a64/codegen-a64.cc Mon Feb 17 15:20:54 2014 UTC
@@ -42,9 +42,11 @@
 byte* fast_exp_a64_machine_code = NULL;
 double fast_exp_simulator(double x) {
   Simulator * simulator = Simulator::current(Isolate::Current());
-  return simulator->CallDouble(fast_exp_a64_machine_code,
-                               Simulator::CallArgument(x),
-                               Simulator::CallArgument::End());
+  Simulator::CallArgument args[] = {
+      Simulator::CallArgument(x),
+      Simulator::CallArgument::End()
+  };
+  return simulator->CallDouble(fast_exp_a64_machine_code, args);
 }
 #endif

=======================================
--- /branches/bleeding_edge/src/a64/simulator-a64.cc Mon Feb 17 12:43:30 2014 UTC +++ /branches/bleeding_edge/src/a64/simulator-a64.cc Mon Feb 17 15:20:54 2014 UTC
@@ -112,19 +112,13 @@
 }


-void Simulator::CallVoid(byte* entry, va_list args) {
+void Simulator::CallVoid(byte* entry, CallArgument* args) {
   int index_x = 0;
   int index_d = 0;

- // At this point, we don't know how much stack space we need (for arguments
-  // that don't fit into registers). We can only do one pass through the
- // va_list, so we store the extra arguments in a vector, then copy them to
-  // their proper locations later.
   std::vector<int64_t> stack_args(0);
-
-  // Process register arguments.
-  CallArgument arg = va_arg(args, CallArgument);
-  while (!arg.IsEnd()) {
+  for (int i = 0; !args[i].IsEnd(); i++) {
+    CallArgument arg = args[i];
     if (arg.IsX() && (index_x < 8)) {
       set_xreg(index_x++, arg.bits());
     } else if (arg.IsD() && (index_d < 8)) {
@@ -133,7 +127,6 @@
       ASSERT(arg.IsD() || arg.IsX());
       stack_args.push_back(arg.bits());
     }
-    arg = va_arg(args, CallArgument);
   }

   // Process stack arguments, and make sure the stack is suitably aligned.
@@ -162,31 +155,14 @@
 }


-
-void Simulator::CallVoid(byte* entry, ...) {
-  va_list args;
-  va_start(args, entry);
-  CallVoid(entry, args);
-  va_end(args);
-}
-
-
-int64_t Simulator::CallInt64(byte* entry, ...) {
-  va_list args;
-  va_start(args, entry);
+int64_t Simulator::CallInt64(byte* entry, CallArgument* args) {
   CallVoid(entry, args);
-  va_end(args);
-
   return xreg(0);
 }


-double Simulator::CallDouble(byte* entry, ...) {
-  va_list args;
-  va_start(args, entry);
+double Simulator::CallDouble(byte* entry, CallArgument* args) {
   CallVoid(entry, args);
-  va_end(args);
-
   return dreg(0);
 }

@@ -197,13 +173,15 @@
                           Object* revc,
                           int64_t argc,
                           Object*** argv) {
-  return CallInt64(entry,
-                   CallArgument(function_entry),
-                   CallArgument(func),
-                   CallArgument(revc),
-                   CallArgument(argc),
-                   CallArgument(argv),
-                   CallArgument::End());
+  CallArgument args[] = {
+    CallArgument(function_entry),
+    CallArgument(func),
+    CallArgument(revc),
+    CallArgument(argc),
+    CallArgument(argv),
+    CallArgument::End()
+  };
+  return CallInt64(entry, args);
 }

 int64_t Simulator::CallRegExp(byte* entry,
@@ -217,18 +195,20 @@
                               int64_t direct_call,
                               void* return_address,
                               Isolate* isolate) {
-  return CallInt64(entry,
-                   CallArgument(input),
-                   CallArgument(start_offset),
-                   CallArgument(input_start),
-                   CallArgument(input_end),
-                   CallArgument(output),
-                   CallArgument(output_size),
-                   CallArgument(stack_base),
-                   CallArgument(direct_call),
-                   CallArgument(return_address),
-                   CallArgument(isolate),
-                   CallArgument::End());
+  CallArgument args[] = {
+    CallArgument(input),
+    CallArgument(start_offset),
+    CallArgument(input_start),
+    CallArgument(input_end),
+    CallArgument(output),
+    CallArgument(output_size),
+    CallArgument(stack_base),
+    CallArgument(direct_call),
+    CallArgument(return_address),
+    CallArgument(isolate),
+    CallArgument::End()
+  };
+  return CallInt64(entry, args);
 }


@@ -2945,7 +2925,7 @@
           next_arg++;
         }

-        int64_t words;
+        int64_t words = 0;
         if (argc == next_arg) {
           words = 10;
         } else if (argc == next_arg + 1) {
@@ -2954,6 +2934,8 @@
             PrintF("Printing 10 double words by default");
             words = 10;
           }
+        } else {
+          UNREACHABLE();
         }
         end = cur + words;

=======================================
--- /branches/bleeding_edge/src/a64/simulator-a64.h Wed Feb 12 13:34:40 2014 UTC +++ /branches/bleeding_edge/src/a64/simulator-a64.h Mon Feb 17 15:20:54 2014 UTC
@@ -203,15 +203,16 @@

   static Simulator* current(v8::internal::Isolate* isolate);

+  class CallArgument;
+
// Call an arbitrary function taking an arbitrary number of arguments. The
   // varargs list must be a set of arguments with type CallArgument, and
   // terminated by CallArgument::End().
-  void CallVoid(byte* entry, ...);
-  void CallVoid(byte* entry, va_list args);
+  void CallVoid(byte* entry, CallArgument* args);

   // Like CallVoid, but expect a return value.
-  int64_t CallInt64(byte* entry, ...);
-  double CallDouble(byte* entry, ...);
+  int64_t CallInt64(byte* entry, CallArgument* args);
+  double CallDouble(byte* entry, CallArgument* args);

   // V8 calls into generated JS code with 5 parameters and into
// generated RegExp code with 10 parameters. These are convenience functions,
=======================================
--- /branches/bleeding_edge/test/cctest/test-assembler-a64.cc Mon Feb 17 15:09:46 2014 UTC +++ /branches/bleeding_edge/test/cctest/test-assembler-a64.cc Mon Feb 17 15:20:54 2014 UTC
@@ -4940,26 +4940,26 @@
   uint32_t raw_n = float_to_rawbits(n);
   uint32_t raw_m = float_to_rawbits(m);

-  if (isnan(n) && ((raw_n & kFP32QuietNaNMask) == 0)) {
+  if (std::isnan(n) && ((raw_n & kFP32QuietNaNMask) == 0)) {
     // n is signalling NaN.
     return n;
-  } else if (isnan(m) && ((raw_m & kFP32QuietNaNMask) == 0)) {
+  } else if (std::isnan(m) && ((raw_m & kFP32QuietNaNMask) == 0)) {
     // m is signalling NaN.
     return m;
   } else if (quiet_nan_substitute == 0.0) {
-    if (isnan(n)) {
+    if (std::isnan(n)) {
       // n is quiet NaN.
       return n;
-    } else if (isnan(m)) {
+    } else if (std::isnan(m)) {
       // m is quiet NaN.
       return m;
     }
   } else {
     // Substitute n or m if one is quiet, but not both.
-    if (isnan(n) && !isnan(m)) {
+    if (std::isnan(n) && !std::isnan(m)) {
       // n is quiet NaN: replace with substitute.
       n = quiet_nan_substitute;
-    } else if (!isnan(n) && isnan(m)) {
+    } else if (!std::isnan(n) && std::isnan(m)) {
       // m is quiet NaN: replace with substitute.
       m = quiet_nan_substitute;
     }
@@ -4982,26 +4982,26 @@
   uint64_t raw_n = double_to_rawbits(n);
   uint64_t raw_m = double_to_rawbits(m);

-  if (isnan(n) && ((raw_n & kFP64QuietNaNMask) == 0)) {
+  if (std::isnan(n) && ((raw_n & kFP64QuietNaNMask) == 0)) {
     // n is signalling NaN.
     return n;
-  } else if (isnan(m) && ((raw_m & kFP64QuietNaNMask) == 0)) {
+  } else if (std::isnan(m) && ((raw_m & kFP64QuietNaNMask) == 0)) {
     // m is signalling NaN.
     return m;
   } else if (quiet_nan_substitute == 0.0) {
-    if (isnan(n)) {
+    if (std::isnan(n)) {
       // n is quiet NaN.
       return n;
-    } else if (isnan(m)) {
+    } else if (std::isnan(m)) {
       // m is quiet NaN.
       return m;
     }
   } else {
     // Substitute n or m if one is quiet, but not both.
-    if (isnan(n) && !isnan(m)) {
+    if (std::isnan(n) && !std::isnan(m)) {
       // n is quiet NaN: replace with substitute.
       n = quiet_nan_substitute;
-    } else if (!isnan(n) && isnan(m)) {
+    } else if (!std::isnan(n) && std::isnan(m)) {
       // m is quiet NaN: replace with substitute.
       m = quiet_nan_substitute;
     }
=======================================
--- /branches/bleeding_edge/test/cctest/test-utils-a64.cc Wed Feb 12 09:19:30 2014 UTC +++ /branches/bleeding_edge/test/cctest/test-utils-a64.cc Mon Feb 17 15:20:54 2014 UTC
@@ -62,7 +62,7 @@
   if (float_to_rawbits(expected) == float_to_rawbits(result)) {
     return true;
   } else {
-    if (isnan(expected) || (expected == 0.0)) {
+    if (std::isnan(expected) || (expected == 0.0)) {
       printf("Expected 0x%08" PRIx32 "\t Found 0x%08" PRIx32 "\n",
              float_to_rawbits(expected), float_to_rawbits(result));
     } else {
@@ -81,7 +81,7 @@
     return true;
   }

-  if (isnan(expected) || (expected == 0.0)) {
+  if (std::isnan(expected) || (expected == 0.0)) {
     printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
            double_to_rawbits(expected), double_to_rawbits(result));
   } else {
=======================================
--- /branches/bleeding_edge/test/cctest/test-utils-a64.h Wed Feb 12 09:19:30 2014 UTC +++ /branches/bleeding_edge/test/cctest/test-utils-a64.h Mon Feb 17 15:20:54 2014 UTC
@@ -161,12 +161,13 @@
     uint64_t flags_;
   } dump_;

-  STATIC_ASSERT(sizeof(dump_.d_[0]) == kDRegSizeInBytes);
-  STATIC_ASSERT(sizeof(dump_.s_[0]) == kSRegSizeInBytes);
-  STATIC_ASSERT(sizeof(dump_.d_[0]) == kXRegSizeInBytes);
-  STATIC_ASSERT(sizeof(dump_.s_[0]) == kWRegSizeInBytes);
-  STATIC_ASSERT(sizeof(dump_.x_[0]) == kXRegSizeInBytes);
-  STATIC_ASSERT(sizeof(dump_.w_[0]) == kWRegSizeInBytes);
+  static dump_t for_sizeof();
+  STATIC_ASSERT(sizeof(for_sizeof().d_[0]) == kDRegSizeInBytes);
+  STATIC_ASSERT(sizeof(for_sizeof().s_[0]) == kSRegSizeInBytes);
+  STATIC_ASSERT(sizeof(for_sizeof().d_[0]) == kXRegSizeInBytes);
+  STATIC_ASSERT(sizeof(for_sizeof().s_[0]) == kWRegSizeInBytes);
+  STATIC_ASSERT(sizeof(for_sizeof().x_[0]) == kXRegSizeInBytes);
+  STATIC_ASSERT(sizeof(for_sizeof().w_[0]) == kWRegSizeInBytes);
 };

// Some of these methods don't use the RegisterDump argument, but they have to

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