Reviewers: Benedikt Meurer, m.m.capewell,
Description:
A64 tweaks for division-like operations.
Please review this at https://codereview.chromium.org/190603003/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+7, -11 lines):
M src/a64/lithium-codegen-a64.cc
M src/a64/macro-assembler-a64.cc
Index: src/a64/lithium-codegen-a64.cc
diff --git a/src/a64/lithium-codegen-a64.cc b/src/a64/lithium-codegen-a64.cc
index
e42ff1089b139e2db96e15f232de2cf1a25714da..ad8d742abac2cc894d292e026d7005b67933e834
100644
--- a/src/a64/lithium-codegen-a64.cc
+++ b/src/a64/lithium-codegen-a64.cc
@@ -2630,8 +2630,7 @@ void LCodeGen::DoDivByConstI(LDivByConstI* instr) {
HDiv* hdiv = instr->hydrogen();
if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero) &&
hdiv->left()->RangeCanInclude(0) && divisor < 0) {
- __ Cmp(dividend, 0);
- DeoptimizeIf(eq, instr->environment());
+ DeoptimizeIfZero(dividend, instr->environment());
}
__ FlooringDiv(result, dividend, Abs(divisor));
Index: src/a64/macro-assembler-a64.cc
diff --git a/src/a64/macro-assembler-a64.cc b/src/a64/macro-assembler-a64.cc
index
4b1d381c29be5e14a140a9feac8e1826bba0d5df..b5a925b337b0ca8be5d89c73acb4f0f09762cf46
100644
--- a/src/a64/macro-assembler-a64.cc
+++ b/src/a64/macro-assembler-a64.cc
@@ -4936,18 +4936,15 @@ void MacroAssembler::FlooringDiv(Register result,
Register dividend,
int32_t divisor) {
Register tmp = WTmp0();
- ASSERT(!AreAliased(dividend, result, tmp));
+ ASSERT(!AreAliased(result, dividend, tmp));
+ ASSERT(result.Is32Bits() && dividend.Is32Bits());
MultiplierAndShift ms(divisor);
Mov(tmp, Operand(ms.multiplier()));
Smull(result.X(), dividend, tmp);
- Mov(result.X(), Operand(result.X(), ASR, 32));
- if (divisor > 0 && ms.multiplier() < 0) {
- Add(result, result, Operand(dividend));
- }
- if (divisor < 0 && ms.multiplier() > 0) {
- Sub(result, result, Operand(dividend));
- }
- if (ms.shift() > 0) Mov(result, Operand(result, ASR, ms.shift()));
+ Asr(result.X(), result.X(), 32);
+ if (divisor > 0 && ms.multiplier() < 0) Add(result, result, dividend);
+ if (divisor < 0 && ms.multiplier() > 0) Sub(result, result, dividend);
+ if (ms.shift() > 0) Asr(result, result, ms.shift());
Add(result, result, Operand(dividend, LSR, 31));
}
--
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