On 2014/03/13 11:57:07, danno-g wrote:
Sorry, I meant:
Callee-saved tagged registers are also not feasible at all, since
generally
the caller can never know if they need to save a register as just bits or
interpret it as an object pointer, i.e. the caller always need to assume
that
tagged registers get clobbered and has to save them before making calls.
Worse, if we have a call chain A -> B -> C with A having callee-saved
registers,
it may be the case that those values are either stored in B or C's frame (or
worse, in some C function's frame somewhere in the middle whose layout we
don't
know). If we were to deoptimize B or C we have to handle any registers they
have
saved on behalf of their caller (i.e. A). I think this is a major
complication
that is likely to have many special cases and produce a steady stream of
hard-to-find bugs.
In general, the strategy to deal with chokepoints like this is to inline the
fast path, which avoids spilling all the registers, and have a deferred path
that only saves the registers in the caller in the slow case.
https://codereview.chromium.org/194793002/
--
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
---
You received this message because you are subscribed to the Google Groups "v8-dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/d/optout.
