https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc
File src/arm64/cpu-arm64.cc (right):
https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc#newcode42
src/arm64/cpu-arm64.cc:42: return 1 << ((cache_type_register_ >>
cache_line_size_shift) & 0xf);
On 2014/05/02 13:12:07, Rodolph Perfetta wrote:
Argh, the original code was wrong (my bad), the size is in words not
bytes so a
further shift by 2 is required to get the size in bytes.
In practice this has no bad side effects as we do more cache
operations than
required and the result will be the same.
Sorry for not spotting it earlier.
So the "1 << ..." should be replaced by a "4 << ..." (and the comment
should be improved)? Could you prepare a CL?
https://codereview.chromium.org/269543016/
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