Reviewers: danno, Paul Lind, palfia, kisg, dusmil,
Message:
bgtz does a signed comparison:
"If the contents of GPR rs are greater than zero (sign bit is 0 but value
not
zero), branch to the effective target address after the instruction in the
delay
slot is executed."
Description:
MIPS: Fix unsigned comparison.
TEST=mjsunit/regress/regress-3380
BUG=
Please review this at https://codereview.chromium.org/329223006/
SVN Base: https://github.com/v8/v8.git@gbl
Affected files (+1, -1 lines):
M src/mips/macro-assembler-mips.cc
Index: src/mips/macro-assembler-mips.cc
diff --git a/src/mips/macro-assembler-mips.cc
b/src/mips/macro-assembler-mips.cc
index
a779333a9a16fd57ae0178723eed92b7f79f28fd..45ba4a994e84efed1d1b8ff96138a8bc4d708f1e
100644
--- a/src/mips/macro-assembler-mips.cc
+++ b/src/mips/macro-assembler-mips.cc
@@ -2114,7 +2114,7 @@ void MacroAssembler::BranchShort(Label* L, Condition
cond, Register rs,
case Ugreater:
if (rt.imm32_ == 0) {
offset = shifted_branch_offset(L, false);
- bgtz(rs, offset);
+ bne(rs, zero_reg, offset);
} else {
ASSERT(!scratch.is(rs));
r2 = scratch;
--
--
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