On Fri, May 9, 2014 at 10:19 AM, Yang Guo <[email protected]> wrote:
> To reduce code complexity of the IA32 port of V8, we decided to drop support
> for Intel chips with no SSE2/CMOV support. This does not affect the X64
> port, as it always includes SSE2/CMOV. This starts with the 3.26 release.
> Upcoming changes to the code base will reflect this change by removing
> non-SSE2/CMOV specific code from the V8 code base.

You mean I won't be able to run V8 on my P3 anymore?  Outrageous!  I
want my money back!

Jokes aside, a while ago I did some non-scientific benchmarks on cmov
vs. cmp + a conditional jump (trying to speed up polymorphic functions
in OCaml) and cmov was always slower on an i7.  Maybe it performs
better on older CPUs, I didn't test that.

I'm not 100% sure why that is but Linus Torvalds puts forth some
hypotheses here[1] that sound plausible: the branch predictor
speculates that the branch last taken will be taken again.  Most
branches are not perfectly equally distributed so branch prediction is
a win on average.  Whereas cmov always has a data dependency and
therefore isn't amenable to that kind of speculative execution.

[1] http://yarchive.net/comp/linux/cmov.html

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