On Thu, May 29, 2014 at 7:53 PM, Hendrik Greving <[email protected]> wrote: > Hi, I looked at the code of these benchmarks and kind of have an idea. > What's unclear to me was a) whether there is some self-checking built-in and > b) let's say I am running this between different chip architectures but the > same instruction set, let's say an old and a new Intel x86 chip, but exactly > the same instruction set, would you expect the same number of instructions > being executed? Basically, are there time components built-in that may vary > the number of instructions being executed? > > Thanks for answers with regards to a) and b)
As to a), V8 checks the capabilities of the CPU it's running on and adjusts its code generator accordingly. SSE3 and SSE4 instructions, for example, are conditionally emitted. So yes, that happens. I'm not sure what you mean with b). If you're asking whether V8 optimizes instruction sequences for specific micro-architectures, like gcc does with the -march= switch, then I believe the answer is 'no'. -- -- v8-users mailing list [email protected] http://groups.google.com/group/v8-users --- You received this message because you are subscribed to the Google Groups "v8-users" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
