Hi Jacob - Currently, we do not plan to support n32 ABI in v8, but I'm happy to give you some pointers that should help if you want to give it a go. You're right that it is mostly about FP register use and the ABI's when calling between C code and the JIT'ed code. There is good info in Domenic Sweetman's "See MIPS Run" book.
The existing O32 ABI uses FP registers in a backward-compatibility mode called 'fp32', where the 32 FP registers are only 32-bits each, and to store a double, a pair of FP registers are used. The n32 and n64 ABI's use 'fp64' mode, where each of the 32 FP registers are 64-bits wide. This changes how code must load these registers. You will need to use fp64 mode for your n32 version of v8. The good news is that we are working on this change currently, and I would hope that we have it upstreamed in the next 3-4 weeks. For now, you can look at this branch, which implements fp64 mode on mips32 v8 (in an older version of v8): https://github.com/paul99/v8m-rb/tree/dm-dev-fp64. We also use fp64 mode in the mips64 v8. Something to keep in mind is that MIPS cpus require doubles to be 8-byte aligned, and 32-bit v8 only maintains 4-byte alignment. So we do not use the normal ldc1/sdc1 instructions to load/store doubles, we load/store 32-bits at a time. See https://github.com/paul99/v8m-rb/blob/dm-dev-fp64/src/mips/assembler-mips.cc#L1628 for how this is done in the two different FP modes. (There are other changes as well, look at the full commit.) For the ABI issues, you can look at the mips64 port, and search for 'MIPS_ABI_N64' and 'kMipsAbi'. For example, https://github.com/v8/v8/blob/master/src/mips64/code-stubs-mips64.cc#L2582. You'll need to make similar changes in the 32-bit v8 to support n32. Hope this helps, paul On Jul 15, 2014, at 7:40 AM, Jacob Burkholder <[email protected]> wrote: > Hello, I have an embedded big endian mips target that I'd like to use v8 on > and would like to use n32 abi. I understand that only o32 is currently > supported. It seems that the difference in floating point registers and > calls to native runtime functions due to different argument registers and > different stack slot size are what will be affected. Is there something > else? Is anyone working on this or can give me an overview of what changes > need to be made? I've poked around a bit in the v8 source code and am > somewhat familiar. > > Thanks. > > -- > -- > v8-users mailing list > [email protected] > http://groups.google.com/group/v8-users > --- > You received this message because you are subscribed to the Google Groups > "v8-users" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > For more options, visit https://groups.google.com/d/optout. -- -- v8-users mailing list [email protected] http://groups.google.com/group/v8-users --- You received this message because you are subscribed to the Google Groups "v8-users" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
