Hi,
I'm making a Valgrind tool that reconstructs a binary's control flow graph.
I'd like there to be no duplicate instructions in the CFG. VEX disassembles
until it hits the next control transfer instruction. So there are duplicates
caused by code like this:
if ( guard )
{
b1
}
b2
If the guard evaluates to true, then there will be a super block that's the
concatenation of b1 & b2, if guard is false, then another superblock will be
created just for b2.
I tried the obvious step of finding the first instruction of b2 in b1, and
replacing it with a jump. But that stuffs up the register allocation. For
example, if I replace the instructions at 0x4005aa50 in the second block with a
call to the first block below. Then instead of doing a STLe to GET:I32(96) +
0x460, it does it to GET:I32(0) + 0x460. Eeek, that fails.
------ IMark(0x400aa50, 3) ------
t2 = GET:I32(16)
t0 = Add32(t2,0x1:I32)
IR-NoOp
t24 = _32Uto64(t0)
t12 = t24
PUT(16) = t12
------ IMark(0x400aa53, 7) ------
PUT(168) = 0x400aa53:I64
t14 = GET:I64(0)
t13 = Add64(t14,0x460:I64)
t15 = GET:I64(96)
STle(t13) = t15
------ IMark(0x400aa4a, 3) ------
t13 = GET:I64(96)
------ IMark(0x400aa4d, 2) ------
PUT(16) = 0x0:I64
IR-NoOp
PUT(16) = 0x0:I64
------ IMark(0x400aa4f, 1) ------
------ IMark(0x400aa50, 3) ------
t5 = GET:I32(16)
t3 = Add32(t5,0x1:I32)
IR-NoOp
t31 = _32Uto64(t3)
t19 = t31
PUT(16) = t19
------ IMark(0x400aa53, 7) ------
PUT(168) = 0x400aa53:I64
t20 = Add64(t13,0x460:I64)
STle(t20) = t13
Can anyone think of a solution?
thanks,
Trevor
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