On Friday, September 02, 2011 12:56:25 AM David Lerner wrote: > > # valgrind -v ./diftDec dift_422cmode2_no_hdr.data output.dat -hdr -f > > 422 Illegal instruction > > I'm seeing the same symptom on a cortex a9 (see 1 below) which doesn't have > the SIMD (neon) nor VFP extensions. From the arm reference manual: > "Advanced SIMD and VFP are two optional extensions to ARMv7". My board > doesnt have those options, just the embedded FPU.
So, a correct diagnosis -- the code has never been checked for a no-VFP no-NEON setup. I didn't think such things existed. Fixing it right will require configury hacking, and I don't have the h/w to check it with. > I experimented patching out the unimplemented opcodes, but as implied by > the comment 'vex-required default value' , there was an invariant failure > (see 3 below) which I haven't tracked down yet. You're on the right track. FWIW the x86-linux dispatcher has analogous ifdeffery which stops it SIGILLing when run on a non-SSE capable CPU. The "invariant failure" I think is a check, in the same file you edited, that the FPSCR values that are set up by the instructions you commented out, haven't changed. So if you can find the check bit, and comment that out, you'll be in with a chance. J ------------------------------------------------------------------------------ Special Offer -- Download ArcSight Logger for FREE! Finally, a world-class log management solution at an even better price-free! And you'll get a free "Love Thy Logs" t-shirt when you download Logger. Secure your free ArcSight Logger TODAY! http://p.sf.net/sfu/arcsisghtdev2dev _______________________________________________ Valgrind-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/valgrind-users
