A little while ago I posted about the non-implementation of the AMD 64 SSE 4.2 instructions PCMPxSTRx for 16-bit characters (many 8-bit sub-operations were supported). I got them working, and was (reasonably) directed to move to svn head if I want to be able to send in a patch.
I did that, but when I run the updated valgrind on the same program as before (Oracle's HotSpot JVM), it fails on a 0xF 0xAE 0x3F instruction, which appears to be either a CLFLUSH or an SFENCE (both decode the same way in the docs, so I am slightly confused). Either way, it worked in the latest stable release, and I didn't mess with that decoding. I will see if I can replicate it on svn head without my mods, but wanted to give a heads up. Any notion what's happening? It is becoming apparent that it might be nice to have more control over which x86 family processor is supported as the guest. If I downgraded the guest some then I think that HotSpot would avoid these instruction that I am having to add ... which come about apparently because valgrind claims via cpuid to support a really advanced processor, but then does not support all of its instructions. But I can see that it would be a significant project to support a range of guest processor capabilities controlled with flags, etc. Regards -- Eliot Moss ------------------------------------------------------------------------------ Try before you buy = See our experts in action! The most comprehensive online learning library for Microsoft developers is just $99.99! Visual Studio, SharePoint, SQL - plus HTML5, CSS3, MVC3, Metro Style Apps, more. Free future releases when you subscribe now! http://p.sf.net/sfu/learndevnow-dev2 _______________________________________________ Valgrind-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/valgrind-users
