On Monday 27 August 2012 15:25:14 Marc Mutz wrote:
> If atomic loads and stores on x86 are implemented with a volatile cast,
> then  the compiler can't reorder stuff around them, either. Not more than
> with a std::atomic, at least. QAtomic does that. For load-relaxed, Thiago
> thinks that a normal read (non-volatile) is correct and I couldn't prove
> him wrong.

I was talking to Julian about this again today, and he pointed me to this 
writeup:

http://software.intel.com/en-us/blogs/2007/11/30/volatile-almost-useless-for-multi-threaded-programming

We're looking at how to silence valgrind about Qt atomic ops, but before that,
it would actually be good to be sure that what Qt does it correct, on x86....

Where does the claim about "volatile cast means the compiler can't reorder 
stuff around them"
come from?

In the Qt source code I see qatomic_gcc.h (which is unused, unfortunately) 
calling
__sync_synchronize() in loadAcquire(). Shouldn't Qt's code call that, when 
compiled with gcc?

This does lead to different assembly, too, on x86.
So the claim that x86 doesn't need memory barriers seems wrong?

--- testcase_atomic_ops_helgrind.s.orig 2013-01-23 15:04:20.889417624 +0100
+++ testcase_atomic_ops_helgrind.s      2013-01-23 15:07:06.938422071 +0100
@@ -380,6 +380,7 @@ _ZN10QAtomicOpsIiE11loadAcquireERKi:
        movq    -24(%rbp), %rax
        movl    (%rax), %eax
        movl    %eax, -4(%rbp)
+       mfence
        movl    -4(%rbp), %eax
        popq    %rbp
        .cfi_def_cfa 7, 8
@@ -403,6 +404,7 @@ _ZN10QAtomicOpsIiE12storeReleaseERii:
        movq    -8(%rbp), %rax
        movl    -12(%rbp), %edx
        movl    %edx, (%rax)
+       mfence
        popq    %rbp
        .cfi_def_cfa 7, 8
        ret


-- 
David Faure, fa...@kde.org, http://www.davidfaure.fr
Working on KDE, in particular KDE Frameworks 5


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