>>> But of course, we all agree it would be nice to have 80 bits floats >>> properly supported by Valgrind.
To support this for 64-bit processes would require, roughly: * add an F80 (80-bit floating point) type to IR * add relevant 80-bit equivalents of the relevant IROps (AddF80, SubF80, SinF80, etc) * change the front end (guest_amd64_toIR.c) to generate IR that uses those new IROps * change the back end (host_amd64_isel.c) to generate 80 bit FP instructions from that IR. Much of the back end stuff could be imported from the x86 (32-bit) compilation pipeline. That already has machinery to generate x87 code and in particular to deal with the x87 register-stack wierdness. That would get a baseline simulator (--tool=none) that works OK, Getting Memcheck to work requires extra steps: * add an I80 (80-bit integer) type to IR * add 80 bit versions of the few IROps that Memcheck requires (CmpwNEZ80, CmpNEZ80, Left80) * add instruction selection to deal with those. The tricky bit is that these will have to be generated into register-pairs, in the style of the existing iselInt128Expr, except that only the lowest 16 bits of the high-part register is used. And comprehensive test cases, of course. These are the most important single piece, since they can be used to drive the rest of the development. J ------------------------------------------------------------------------------ Flow-based real-time traffic analytics software. Cisco certified tool. Monitor traffic, SLAs, QoS, Medianet, WAAS etc. with NetFlow Analyzer Customize your own dashboards, set traffic alerts and generate reports. Network behavioral analysis & security monitoring. All-in-one tool. http://pubads.g.doubleclick.net/gampad/clk?id=126839071&iu=/4140/ostg.clktrk _______________________________________________ Valgrind-users mailing list Valgrind-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/valgrind-users
